Texas Instruments Corporation

Lei Wu

Devanathan Varadarajan

Methods to test functional memory interface logic of a core under test utilize a built-in-self-test (BIST) controller to generate test sequences, and a clock-gating circuit to selectively supply the test sequences to a memory input or memory output on the core under test. After an initial data initialization of the core under test at BIST mode, an at-speed functional mode is utilized to capture a desired memory output.

At-speed test of functional memory interface logic in devices

A device to test functional memory interface logic of a core under test is described herein. The device includes and utilizes a built in self test controller to generate test sequences, and a clock-gating circuit to selectively supply the test sequences to a memory input or memory output on the core under test. After an initial data initialization of the core under test at built in self test mode, an at-speed functional mode is utilized to capture a desired memory output.

Growing community of inventors

Sugar Land, TX, United States of America

Lei Wu