Qualcomm Incorporated

Element Biosciences, Inc.

Lei Sun

Dinesh Jagannath Alladi

Seyed Arash Mirhaj

Michael Previte

Molly Min He

Matthew William Kellinger

Chunhong Zhou

Sinan Arslan

Elias Dagher

Aram Akhavan

Ganesh Kiran

Yuhua Guo

Yongjian Tang

Adeline Huizhen Mah

Sean Vincent Maschue

Kentaro Yamamoto

Cheng Tan

Honghao Ji

Anand Meruva

Hui Zhen Mah

Brian French

Bruce Charles Fischer, Jr

Yan Wang

Behnam Sedighi

Minghao Guo

Chieh-Yu Hsieh

Masoud Ensafdaran

Balasubramanian Sivakumar

Leon Zilun Zhang

Dan Yuan

Tszwing Choi

Henry Lau

Hui Zhen Ma

A boost circuit includes a first p-type field effect transistor (PFET), a second PFET, a first capacitor, and a second capacitor. A drain of the first PFET and a drain of the second PFET are coupled to a supply rail in a first voltage domain, a gate of the first PFET is coupled to a source of the second PFET, and a gate of the second PFET is coupled to a source of the first PFET. A first terminal of the first capacitor is coupled to the source of the first PFET and a first terminal of the second capacitor is coupled to the source of the second PFET. A second terminal of the first capacitor and a second terminal of the second capacitor are driven by a first control signal and a second control signal, respectively, in a second voltage domain.

Dual voltage level bootstrap switch

A capacitor device comprises a semiconductor substrate with multiple metal layers above the substrate. a first metal layer has a first plurality of bottom terminals elongated in a first direction, and a first plurality of top terminals, electrically coupled to each other, elongated in the first direction and interleaved with the first plurality of bottom terminals. A second metal layer between the semiconductor substrate and the first metal layer has a second plurality of bottom terminals elongated in the first direction, and a second plurality of top terminals, electrically coupled to each other and the first plurality of top terminals, elongated in the first direction and interleaved with the second plurality of bottom terminals.

Matching unit capacitor with multiple metal layers

A system includes a switch transistor, and a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor. The system also includes a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor. The system further includes a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit.

Kickback reduction in bootstrapped switches

Multivalent binding compositions including a particle-nucleotide conjugate having a plurality of copies of a nucleotide attached to the particle are described. The multivalent binding compositions allow one to localize detectable signals to active regions of biochemical interaction, e.g., sites of protein-protein interaction, protein-nucleic acid interaction, nucleic acid hybridization, or enzymatic reaction, and can be used to identify sites of base incorporation in elongating nucleic acid chains during polymerase reactions and to provide improved base discrimination for sequencing and array based applications.

Multipart reagents having increased avidity for polymerase binding

A system includes a bootstrap circuit having an input and an output. The bootstrap circuit includes a boost capacitor having a first terminal and a second terminal, a first transistor coupled between the first terminal of the boost capacitor and the output of the bootstrap circuit, a second transistor, and a third transistor, wherein the second transistor and the third transistor are coupled in series between a gate of the first transistor and the second terminal of the boost capacitor. The system also includes a switch transistor, wherein a gate of the switch transistor is coupled to the output of the bootstrap circuit, and a terminal of the switch transistor is coupled to the input of the bootstrap circuit.

Non-overlapping generation technique for bootstrap switches

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may filter leaked power from a signal to accurately perform antenna compensation operations (e.g., apply a transmit gain, perform cable loss measurements) using valid power. A switch at the UE may leak power to an antenna for a transmission, and the UE may use a dynamic filtering algorithm to determine whether a pulse power of a detected signal is leaked or valid. The dynamic filtering algorithm may be able to account for variations in leaked power values, as leaked power may increase or decrease proportionally to intended power (e.g., from which power was leaked). By determining whether pulse power is leaked or valid, the UE may be able to filter out the leaked power and accurately perform antenna compensation operations such as applying a transmit gain for a transmission, performing a cable loss measurement, or the like.

Transmit diversity power leakage detection and filtering in antenna compensator power detector

An apparatus is disclosed for gain stabilization. In an example aspect, the apparatus includes an amplifier and a gain-stabilization circuit. The amplifier has a gain that is based on a bias voltage and an amplification control signal. The gain-stabilization circuit is coupled to the amplifier and includes a replica amplifier. The replica amplifier has a replica gain that is based on the bias voltage and the amplification control signal. The gain-stabilization circuit is configured to adjust at least one of the bias voltage or the amplification control signal based on a gain error associated with the replica amplifier.

Gain stabilization

Certain aspects of the present disclosure provide techniques for determining a cable loss associated with a transmission cable of an apparatus. An example method includes sending, to a radio modem of the apparatus, a request for the radio modem to use a target power when sending one or more signals to the signal compensator device for determining a cable loss associated with a transmission cable communicatively coupling the radio modem with the signal compensator device, receiving, at a signal compensator device of the apparatus, the one or more signals from the radio modem sent using the target power, and determining the cable loss associated with the transmission cable based on the one or more signals.

Techniques for accurate cable loss measurement

An apparatus is disclosed for pipelined analog-to-digital conversion. In an example aspect, the apparatus includes a pipelined analog-to-digital converter (ADC). The pipelined ADC includes a first stage and a second stage. The first stage includes a sampler and a quantizer coupled to the sampler. The first stage also includes a current distribution circuit coupled to the sampler. The second stage includes a sampler coupled to the current distribution circuit and a quantizer coupled to the sampler of the second stage.

Pipelined analog-to-digital conversion

An apparatus is disclosed for analog-to-digital conversion. In an example aspect, the apparatus includes an analog-to-digital converter (ADC). The ADC includes a reference-crossing detector having an input and an output. The ADC also includes a ramp generator coupled between the output of the reference-crossing detector and the input of the reference-crossing detector. The ADC further includes a voltage shifter coupled between the output of the reference-crossing detector and the input of the reference-crossing detector.

Analog-to-digital conversion

Techniques and apparatus for output common-mode control of dynamic amplifiers, as well as analog-to-digital converters (ADCs) and other circuits implemented with such dynamic amplifiers. One example amplifier circuit includes a dynamic amplifier and a current source. The dynamic amplifier generally includes differential inputs, differential outputs, transconductance elements coupled to the differential inputs, a first set of capacitive elements coupled to the differential outputs, and a control input for controlling a time length of amplification for the dynamic amplifier. The current source is configured to generate an output current such that portions of the output current are selectively applied to the differential outputs of the dynamic amplifier during at least a portion of the time length of amplification.

Output common-mode control for dynamic amplifiers

Flow cell devices, cartridges, and systems are described that provide reduced manufacturing complexity, lowered consumable costs, and flexible system throughput for nucleic acid sequencing and other chemical or biological analysis applications. The flow cell device can include a capillary flow cell device or a microfluidic flow cell device.

Flow cell systems and devices

Certain aspects of the present disclosure provide a successive approximation register (SAR) analog-to-digital converter (ADC) implemented with a digital filter for noise shaping. For example, certain aspects provide a circuit for analog-to-digital conversion having: a first digital-to-analog converter (DAC) having an output coupled to a sampling node; a comparator having an input coupled to the sampling node; SAR logic having an input coupled to an output of the comparator and at least one output coupled to an input of the first DAC; a quantizer configured to generate a first digital signal representing a voltage at the sampling node; a digital filter configured to apply a filter to the first digital signal; and a second DAC configured to generate an analog signal representing the filtered first digital signal and provide the analog signal to the sampling node.

Successive approximation register (SAR) analog-to-digital converter (ADC) with noise-shaping property

Certain aspects provide a circuit for analog-to-digital conversion. The circuit generally includes a flash analog-to-digital converter (ADC) having a plurality of comparators, each comparator being configured to compare an input voltage to a reference voltage; and a calibration circuit coupled to the flash ADC and configured to tune the reference voltage prior to a conversion operation by the flash ADC.

Growing community of inventors

San Diego, CA, United States of America

Lei Sun