Advanced Micro Devices Corporation

Bandspeed, Inc.

Lei Cheng

Efstratios Skafidas

Ben William Jones

Neil Patrick Kelly

Mark William Benson

Mike Gibson

Nestor Fesas

Natarajan Ekambaram

Kevin Sean Broe

Richard John Rusnak

James Glick

Duy Khuong Do

John Y Morton

Michael T Wisor

Yi Liu

Douglas Mammoser

Frank J Gorishek

John “Jack” Morton

John (Jack) Morton

Thomas F Eckert

Douglas A Mammosser

Ben Jones

Douglas A Mammoser

A multiple access wireless communications architecture provides selective, simultaneous communications with wireless devices located in different sections of a spatial area around a communications apparatus referred to as 'sectors'. In one embodiment, channel allocation techniques for increasing one or more of throughput and coverage in a wireless communications environment. In one embodiment, a mode of operation is selected from a plurality of modes of operation, enabling a wireless communications transmitter to be dynamically configured to reach a wireless communications devices at a greater distance from the transmitter without increased interference between communications channels ('range mode') or to provide wireless communications to a greater number of wireless communications devices within a relatively closer distance to the wireless transmitter (&#x201c;capacity mode&#x201d;) or to provide wireless communications using a single channel to provide wireless communications at a relatively greatest distance from the transmitter (&#x201c;super range mode&#x201d;).

Method and apparatus for coverage and throughput enhancement in a wireless communication system

A method for performing fast multiplication in a microprocessor is disclosed. The method comprises detecting multiplication operations that have a floating point operand and an integer operand, wherein the integer operand is an integer power of two. Once detected, a multiplication operation meeting these criteria may be executed by using an integer adder to sum the integer power and the floating point operand's exponent to from a product exponent. The bias of the integer operand's exponent may also be subtracted. A product mantissa is simply copied from the floating point operand's mantissa. The floating point operand's sign bit may be inverted to form the product's sign bit if the integer operand is negative. Advantageously, the product is generated using integer addition which is faster than floating point multiplication. The method may be implemented in hardware or software.

Fast multiplication of floating point values and integer powers of two

A method for testing the functioning of a non-cacheable region within a cache having a cache controller programmed with a write-back write policy and a non-cacheable region included in an image memory region corresponding to a physical memory region. A first data pattern is written to the cache tagged at a first addressable location of a cacheable region in the physical memory region. A second data pattern is written to the cache tagged at a second addressable location in the image memory region contained within both the non-cacheable region and the cacheable region and corresponding to the first addressable location. The data stored in the cache and tagged at the first addressable location and corresponding to the non-cacheable region only of the second addressable location is read to determine whether the first data pattern remains in the cache thereby indicating that the non-cacheable region is functioning correctly. The data stored and tagged at a third addressable location in the physical memory region and corresponding to the cacheable region only of the second addressable location in the image memory region is read to determine whether the second data pattern remains in the cache tagged at the third addressable location thereby indicating that the non-cacheable region is functioning correctly and that the memory size of the non-cacheable region is correct.

Method for testing the non-cacheable region functioning of a cache

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Austin, TX, United States of America

Lei Cheng