Korea Advanced Institute of Science and Technology

Samsung Electronics Co., Ltd.

Skhynix Inc.

Lee-Sup Kim

Young-Suk Moon

Yong-Kee Kwon

Won-Gyu Shin

Chang-Hyo Yu

Jung-Whan Choi

Kwang-il Park

Sangwon Ha

Seungkyu Choi

Byung-Guk Kim

Hong-Yun Kim

Sang-Hye Chung

Yong-Hun Kim

Jaekang Shin

A neural network data quantizing method includes: obtaining local quantization data by firstly quantizing, based on a local maximum value for each output channel of a current layer of a neural network, global recovery data obtained by recovering output data of an operation of the current layer based on a global maximum value corresponding to a previous layer of the neural network; storing the local quantization data in a memory to perform an operation of a next layer of the neural network; obtaining global quantization data by secondarily quantizing, based on a global maximum value corresponding to the current layer, local recovery data obtained by recovering the local quantization data based on the local maximum value for each output channel of the current layer; and providing the global quantization data as input data for the operation of the next layer.

Method and apparatus with neural network data quantizing

A memory controller includes a scheduler that decides a processing order of a plurality of requests provided from an external device with reference to a timing parameter value for each of the requests; and a timing control circuit that adjusts the timing parameter value according to a corresponding address to access a memory device, the corresponding address being used to process a corresponding request of the plurality of requests.

Memory controller

A memory controller schedules requests to memory devices according to scores. For this purpose, the memory controller variably adjusts weights for determining the scores with respect to the requests, calculates the scores using the weights, and determines a processing order of the requests according to the scores. The memory controller includes a request queue, a scheduler, and a weight generation circuit. The request queue stores the requests provided from an external device. The scheduler calculates a score for each request included in the request queue and determines the processing order of the requests based on the scores for the requests. The weight generation circuit generates a weight vector including the weights used to calculate the scores.

Memory controller scheduling requests according to scores

A data signal receiver includes a clock signal filter, a falling pulse signal generator, a mixing block, and a sampler. The clock signal filter generates a first filtered clock signal and a second filtered clock signal by filtering a clock signal. The falling pulse signal generator generates a falling pulse signal based on the first filtered clock signal. The mixing block generates a mixed data signal by mixing a data signal and the falling pulse signal. The sampler generates a recovered data signal by sampling the mixed data signal in response to the second filtered clock signal.

Data signal receiver, transceiver system and method of receiving data signal

A graphic processor includes a rasterizer configured to process vertex data to generate fragment data based on a maximum depth value, a minimum depth value, and a mask bit of each pixel included in one tile, each mask bit indicating whether each pixel is drawn or not, the vertex data including three dimensional information of the pixels, a pixel shader configured to process the fragment data to generate color data, and a raster operation unit configured to convert the color data to pixel data to be displayed.

Graphic processor and method of early testing visibility of pixels

A multi-phase signal generator may include a duty control buffer configured to receive a first differential input signal and a second differential input signal, and generate a first differential output signal and a second differential output signal having variable duty ratios based on a control voltage, a first edge combiner configured to generate a first pulse signal based on first edges of the respective first and second differential output signals, a second edge combiner configured to generate a second pulse signal based on second edges of the respective first and second differential output signals, and a control voltage generator configured to generate the control voltage in response to a logic signal obtained by performing a logic operation on the first and second pulse signals.

Wide frequency multi-phase signal generator with variable duty ratio and method thereof

Provided are a 3D graphics rendering engine for processing fragments and a 3D graphics rendering engine method. The 3D graphics rendering engine positions a depth filter having a specific z value in a depth filtering circuit and compares a depth value of each of a plurality of fragments forming a first object being rasterized in a 3D space with a depth value of the depth filter. Then, the 3D graphics rendering engine stores data, which is mapped to the depth filter and corresponds to each of the fragments of the first object, in a storage device, based on the result of the comparison concerning the first object and rasterizes each of a plurality of fragments forming a second object. After that, the 3D graphics rendering engine renders the fragments of the first object and compares a depth value of each of the fragments of the second object in the 3D space with the depth value of the depth filter and removes at least one fragment from the second object that is overlapped with the first object, based on the result of the comparison concerning the second object and based on the data corresponding to each of the fragments of the first object, the data being stored in the storage device. In addition, the 3D graphics rendering engine corrects the position of the depth filter in real time according to the spatial distribution of rendered fragments.

Growing community of inventors

Daejeon, South Korea

Lee-Sup Kim