Siliconix Incorporated

Lee Shawn Luo

Anup Bhalla

Yueh-Se Ho

Jacek Korec

Y Mohammed Kasem

Eddy Tjhia

Bosco Lan

Chang-Sheng Chen

In a semiconductor package for a chip having terminals on both sides, for example, a power MOSFET in which the gate and source terminals are on the front side and the drain terminal is on the back side, electrical contact is made with the back side terminal by extending vias, which can take the form of trenches, holes or other cavities, either entirely or patrially through the chip. The vias are filled with a metal or other electrically conductive material. The process is performed on the chips in a wafer simultaneously. The resulting package is compact and economical to manufacture and can readily be mounted, flip-chip style, on a printed circuit board.

Vertical structure for semiconductor wafer-level chip scale packages

Growing community of inventors

San Jose, CA, United States of America

Lee Shawn Luo