Intersil Corporation

Lee L Evans

Peter D Bradshaw

David Bingham

A dual slope analog-to-digital converter with automatic short cycle range determination. The time period of the signal integrate phase is adjusted to accommodate different ranges of input signals. Range selection is achieved automatically with the converter switching quickly from one range to another until the right range is found, without the necessity of displaying an 'out of range' reading. Normal mode rejection of 60 Hz noise is achieved on all timing ranges.

Dual slope analog-to-digital converter with automatic, short cycle range

An integrating type analog-to-digital converter with improved time measurement capabilities and a very fast conversion cycle. The converter operates by integrating an analog input signal for a predetermined time period and then deintegrating the integrated signal until its output crosses zero. The time it takes for the integrator to cross zero is measured by a digital clock, and the zero crossing is detected as occurring on the first clock pulse after the integrator output has actually crossed zero. The residual output of the integrator at the point of detection is multiplied by a predetermined negative amount and fed back so that the integrator output assumes the multiplied value of the residual. The integrator is then deintegrated for a second time and the time it takes for the integrator output to pass zero is again measured by the clock. The measured time is proportional to the error in the measurement between the detected zero crossing and actual zero crossing in the initial deintegration cycle. By subtracting a predetermined fraction of the second deintegration time from the first deintegration time, a more accurate measure of the actual time it takes the integrator output to cross zero is obtained. By utilizing a plurality of subsequent multiplication and deintegration cycles, the resolution of the actual deintegration time measurement may be further increased. Using this technique, a 12 bit measurement can be made with less than 200 clock pulses as a opposed to 8,192 (2.sup.13) in prior art converters.

High speed integrating analog-to-digital converter

A digitally switched analog signal conditioner comprising a plurality of pairs of input terminals, a junction, and an output terminal; a plurality of capacitors, first ends of the capacitors being connected to the junction; a plurality of switches being arranged in pairs, first ends of each pair being connected to the other ends of different ones of the capacitors, the other ends of each pair being connected to respective ones of a pair of input terminals, the switches of each pair being adapted to be operated alternatively; an amplifier having an input and an output, the input being operatively coupled to the junction; and a sample and hold circuit operatively coupled to the output of the amplifier for periodically sampling and holding the output, the output of the sampling and holding circuit being connected to one of the input terminals of one of the pairs of input terminals, the other of the terminals of the one pair of input terminals being connected to a point of reference potential.

Digitally switched analog signal conditioner

An operational amplifier is provided having two input legs and a reference leg. In order to eliminate any input offset voltage between the two input legs, the reference leg is balanced against the first input leg and then against the second input leg so that the first input leg is thereby balanced against the second input leg and any offset voltage is significantly reduced or eliminated.

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Atherton, CA, United States of America

Lee L Evans