Texas Instruments Corporation

Lee Alan Stringer

Mona M Eissa

Sudtida Lavangkul

Sopa Chevacharoenkul

Stephen Arlon Meisner

Mark L Jenson

Byron J R Shulver

Mark R Kimmich

Lin Li

Byron Lovell Williams

John Paul Campbell

Alfred J Griffin, Jr

Maxwell Walthour Lippitt, Iii

Neel A Bhatt

Charles Leighton

Stephen Fredrick Clark

Fred Percy Debnam, Ii

Lisa A Fritz

A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

Selective patterning of titanium encapsulation layers

Selective patterning of an integrated fluxgate device

A method is disclosed for passivating and contacting a capacitor in an IC above a top level of interconnect metallization, without adding process steps. Passivation is accomplished by a dielectric layer, part of the IC protective overcoat, deposited directly on the capacitor, overlapping the electrode edges. Contact is made to the top electrode of the capacitor by etching small capacitor vias during a bond pad via etch process, followed by depositing and patterning bond pad metal in the capacitor vias to connect the top electrode to other circuit elements in the IC. The top electrode thickness is increased to accommodate the bond pad via etch process.

Capacitor contact formed concurrently with bond pad metallization

Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a substrate. A plurality of aluminum-including bond pads are formed on the semiconductor surface of the substrate. A patterned passivation layer is then formed on the semiconductor surface, wherein the patterned passivation layer provides an exposed area for the plurality of bond pads. Wet etching with a basic etch solution is used to etch a surface of the exposed area of the aluminum-including bond pads, wherein the wet etching removes at least 100 Angstroms from the surface of the bond pads to form a cleaned surface.

Methods for removing contaminants from aluminum-comprising bond pads and integrated circuits therefrom

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McKinney, TX, United States of America

Lee Alan Stringer