Western Digital Technologies, Inc.

Sandisk Technologies Inc.

Laxmi Bhoopali

Ramanathan Muthiah

Savita H Neelannavar

Vered Kelner

Niraj Srimal

Jonathan Journo

Kshitij Gupta

A storage device may be coupled to a host device and the storage device may support a host performance booster (HPB) feature. A controller on the storage device may execute a background relocation operation. During the background relocation operation, the controller may identify a block to relocate data from. The controller may also determine that a relocation system threshold has not been reached. The controller may execute a source selection algorithm configured to minimize HPB entry inactivation resulting from data relocation. The source selection algorithm may include a criterion to enable the controller to select a source block for relocation.

Read access management of host performance booster (HPB) regions by a storage device

A storage device minimizes HPB entry inactivation resulting from data associated with hot reads being retrieved from multiple HPB sub-regions covering a logical-to-physical table. The storage device may support the HPB feature and a multiple HPB sub-region mode. The storage device includes a controller that tracks a hit count associated with a logical block address in a read command. The controller determines that the hit count has reached a hit threshold and updates a hit table to identify logical block address pages associated with hit counts that have reached the hit threshold across HPB sub-regions covering a logical-to-physical table. The controller transmits the hit table to a host device to be stored in an HPB cache on the host device and to be used by the host device for read commands sent from the host device to the storage device.

Providing host with multiple mapping information that span across multiple HPB regions

A storage system has volatile memory for use as a cache and can extend the available caching space by using a host memory buffer (HMB) in a host. However, because accesses to the HMB involve going through a host interface, there may be latencies in accessing the HMB, To reduce access latencies, the storage system views the volatile memory and the HMB as a two-level cache. In one use case, the storage system decides whether to store a logical-to-physical address table in the volatile memory or in the HMB based on a prediction of the likelihood that the table will be updated. If the likelihood for an update is above a threshold, the table is stored in the volatile memory, thereby eliminating the access latencies that would be encountered if the table needs to be updated and is stored in the HMB.

Method and storage system with a layered caching policy

A storage system and method for user-defined data archiving are provided. In one embodiment, the method comprises: receiving a write command from a host; determining whether the storage system received an indicator from the host indicating that data of the write command is archive data; in response to determining that the storage system received the indicator, storing the data in the multi-level memory cells; and in response to determining that the storage system did not receive the indicator, storing the data in the single-level memory cells. Other embodiments are provided.

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Bengaluru, India

Laxmi Bhoopali