Micrel, Incorporated

National Semiconductor Corporation

Lawrence R Sample

James Copland Moyer

Martin J Alter

Robert C Dobkin

Raymond David Zinn

Michael Joseph Mottola

Hiu Fung Ip

Bernard D Miller

Tim D Isbell

Helmuth R Litfin

Robert P Wolbert

Marty E Garnett

In accordance with the present invention, trim pads used in trimming on-chip resistive elements are formed in the scribe channels interposed between respective dice on a wafer. Metal traces connect the trim pads to their associated resistive elements formed on the dice. Thus, each trim pad formed within the scribe channels results in a corresponding increase in the usable silicon surface area of the dice, thereby saving valuable silicon real estate.

Circuit having trim pads formed in scribe channel

A digital value on a plurality of control input terminals of a PCMCIA power multiplexer integrated circuit determines which one if any of a plurality of power input terminals (for example, 12 volts, 5 volts, and 3 volts) is coupled through the integrated circuit to a power output terminal. A decoder which decodes the digital value prevents any two of the power input terminals from being coupled to the power output terminal at the same time. The decoder is programmable so that a single power multiplexer integrated circuit die layout can support a variety of PCMCIA controllers outputting different digital values. The integrated circuit has current limit, controlled power turn on times, and overtemperature protection. A signal indicative of a fault condition (for example, an overtemperature or a current limit condition) is output onto a fault output terminal of the integrated circuit.

PCMCIA power multiplexer integrated circuit with programmable decode

One embodiment of the invention includes multiple patterns on a single mask, where all the patterns on the single mask are used for forming a single product. In the preferred embodiment, each of four quadrants of a mask have a different process layer pattern, where each of the four patterns is associated with a different process layer for the same product. After exposure of the wafer using the mask, the mask is rotated 90.degree. for the next exposure step so that the mask pattern image for the next layer to be formed on the wafer will overlie the designated quadrant of the wafer which will contain the final product. Although, by using this technique, three-quarters of the wafer will be unusable, this partial waste of the wafer will be offset by the savings in mask costs with low volume production, in prototyping situations, and in product debugging. Using the above technique, conventional mask exposure machines may be used.

Mask having multiple patterns

In an instrumentation amplifier a differential input is provided, one side of which is connected to an instrument ground that is remote from the amplifier power supply ground. The remote ground can, under some conditions, operate at a potential that is outside the potential span of the amplifier power supply. Such common mode potentials are difficult to cope with when the difference exceeds about 0.6 volt. The circuit employs a pair of transistors biased to equal current densities. The emitters constitute the circuit input terminals. Means are provided to adjust the transistor collector to base voltage to establish a constant predetermined current. The transistor that is to be connected to the remotely grounded input has a resistor coupled between emitter and base to produce a reference current. A resistor connected between the transistor bases will then assume a potential equal to the emitter potential difference. A current mirror reproduces the base resistor current at the amplifier output terminal. Since the transistor emitters can operate at several volts below ground, an extended common mode range is available.

Instrumentation amplifier with extended common mode range

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San Jose, CA, United States of America

Lawrence R Sample