International Business Machines Corporation

Lawrence Jones

Patrick James Meaney

Glenn David Gilda

David D Cadigan

Christian Jacobi

Stephen J Powell

Gregory Scott Still

Thomas L Jeremiah

Carroll J Dick

Bruce J Ditmyer

A computer-implemented method includes fetching, by a controller, data using a plurality of memory channels of a memory system. The method further includes detecting, by the controller, that a first memory channel of the plurality of memory channels has not returned data. The method further includes marking, by the controller, the first memory channel from the plurality of memory channels as unavailable. The method further includes, in response to a fetch, reconstructing, by the controller, fetch data based on data received from all memory channels other than the first memory channel.

Low latency availability in degraded redundant array of independent memory

A computer-implemented method includes refreshing a set of memory channels in a memory system substantially simultaneously, each memory channel refreshing a rank that is distinct from each of the other ranks being refreshed. Further, the method includes marking a memory channel from the set of memory channels as being unavailable for the rank being refreshed in the memory channel. In one or more examples, the method further includes blocking a fetch command to the memory channel for the rank being refreshed in the memory channel.

Refresh-hiding memory system staggered refresh

Chip performance is measured using LSSD logic to propagate a signal through the LSSD scan path of the chip. The measurement data is compared to tabular data which is used to classify the AC chip performance. The use of the LSSD scan path provides an accurate overall measurement of an entire chip. The circuitry is internal to the system and does not require external test circuitry. No unique test patterns are required for a given chip design. The chip measurements can be made after installation of the chip in a field operational environment as well as during a manufacturing and testing environment. The chip measurements can be made by local execution of the testing or controlled from a remote location.

Calculating AC chip performance using the LSSD scan path

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Lawrence Jones