Analog Devices,inc.

Analog Devices International Unlimited Company

Lawrence Howard Edelson

Trey Roessig

Michael P Daly

Hio Leong Chao

Michael Daly

Marcus O'Sullivan

Enrique Romero Pintado

Kareem Atout

Noel Castro Tenorio

Circuitry and techniques described herein can use a clamp circuit to provide back-drive compensation in applications where a thermoelectric cooler (TEC) device is to be controlled. A back-drive compensation circuit can be used to inhibit or prevent a linear output stage of a TEC control circuit from being forced out of its intended operating range. The clamp circuit can be implemented using a variety of circuit topologies, such as including a comparator arrangement with hysteresis. In another approach, a linear amplifier topology can provide clamping behavior, such as by injecting or sinking a current at the output node or an intermediate node to inhibit or prevent the output node or intermediate node from being driven outside a specified voltage range by an external source.

TEC controller clamp circuit

Techniques for biasing output transistor of a push-pull amplifier output stage are provided. In certain applications the techniques can improve efficiency of the amplifier. In an example, a circuit can include an output stage including first and second output transistors, a first scaled replica transistor corresponding to the first output transistor, and an amplifier circuit in a feedback arrangement for biasing a gate of the first output transistor at a level that, at a specified stand-by current level of the first output transistor, reproduces a voltage difference between the drain and source terminals of the first output transistor across the drain and source terminals of the first replica transistor.

Amplifier biasing techniques

In an example, a circuit for controlling at least two electronic switches in a parallel configuration between a power supply and a load. The circuit includes a control circuit to generate first and second control signals to control first and second electronic switches of the at least two electronic switches, and establish a conduction sequence of the first and second electronic switches using the first and second control signals. The circuit includes a detection circuit configured to detect a current flowing through a control terminal of the first electronic switch during a transition portion, wherein the circuit is configured to adjust the first control signal and establish the second portion of the conduction sequence in response to the detected current.

Dynamic exchange of electrical current control devices in a load current controller

A voltage-controlled oscillator (VCO) comprises a supply voltage node, configured to receive a supply voltage, a VCO output capacitor, configured to provide an oscillating output voltage across the capacitor, a discharge switch configured to discharge the capacitor according to an oscillation frequency of the oscillating output voltage, and a comparator circuit configured to provide, to a control terminal of the discharge switch, a control signal that is determined based on a comparison of the output voltage and a specified threshold voltage. The oscillating output voltage includes a pulse having a ramp slope that is determined as a function of a magnitude of the supply voltage, and is capable of being adjusted independently of the oscillation frequency.

Oscillator circuit with output slope proportional to supply voltage

A circuit to detect states of a signal is provided. The circuit comprises an input node to receive an input signal. A state detection circuit detects a state of the input signal and generates a detection signal. The state corresponds to at least one of three states. Furthermore, the detection signal generated by the state detection circuit has a level based on the detected state of the input signal. A logic discriminator circuit generates first and second state signals based at least partly on the level of the detection signal. A clock detection circuit generates a clock signal based at least partly on a sequence of logic transitions of the first and second state signals.

Four-state input detection circuitry

An adaptive phase offset controller for use with a switching power converter having first and second channels. The controller includes a discriminator which detects a 'critical condition' in which a switching signal for the first channel transitions during a critical time interval so as to give rise to crosstalk that can corrupt the operation of the second channel's control circuit. When the discriminator detects a critical condition, a phase offset circuit offsets the phase of the first channel's switching signals, such that subsequent transitions occur outside of the critical time interval. A second discriminator and phase offset circuit are preferably employed to detect critical conditions which can give rise to crosstalk that can corrupt the operation of the first channel's control circuit.

Adaptive phase offset controller for multi-channel switching power converter

A sigma-delta converter suitable for measuring a photocurrent comprises an input node adapted to receive a current to be measured (I), a capacitor connected to the input node, a clocked comparator coupled to the input node and to a reference voltage Vat respective inputs, and a switchable current source connected to the input node which conducts a reference current Iwhen switched on. The converter is arranged in a sigma-delta configuration, with the current source switched on to pull down the voltage (V) at the input node when the comparator output toggles due to Vincreasing above V, and to be switched off when the comparator output toggles due to Vfalling below V, such that the comparator output comprises a digital bitstream which varies with I.

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Fremont, CA, United States of America

Lawrence Howard Edelson