Motorola Corporation

Motorola Mobility LLC

Lawrence F Cygan

Paul H Gailus

William J Turney

Andrew Merritt Khan

Gustavo Dario Leizerovich

Michael H Baker

Richard S Bickham

Curtis M Williams

Robert E Stengel

Francis R Yester, Jr

John K Grosspietsch

Wang-Chang A Gu

Carl Missele

Raul Olivera

Helge O Granberg

Shamik Mukherjee

John F Pottle

An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit. There is also a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor and a voltage dependent non-linear resistor is coupled across the gate electrode and second electrode of the upper transistor. In use, when the lower transistor and upper driver transistor are in a non-conductive state a potential difference across the voltage dependent non-linear resistor is sufficiently small enough to control the upper transistor into a conductive state. Conversely, when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a negative bias to the gate electrode of the upper transistor that has a negative potential sufficient to control the upper transistor into a non-conductive state.

Circuit with a voltage dependent resistor for controlling an on/off state of a transistor

A method and apparatus for direct conversion of digital data to high power RF signals, known as DDRF. The method and apparatus receive a digital signal, create a digital modulated signal therefrom, and amplify the modulated signal with an H-bridge Power Amplifier for transmission. DDRF uses a multi-level H-bridge amplification circuit to establish a more power efficient digital transmitter.

Method and apparatus for direct digital to radio frequency conversion

A power amplifier that includes: an input drive controller () for receiving an input signal () and for generating from the input signal at least a first drive signal (), a second drive signal (), and a third drive signal (); an outphasing amplifier network () coupled to the input drive controller that includes at least a first outphasing amplifier () for amplifying the first drive signal and a second outphasing amplifier () for amplifying the second drive signal; a peaking amplifier network () coupled to the input drive controller that includes at least a first peaking amplifier () for amplifying the third drive signal; and a combining network () coupled to the outphasing amplifier network and the peaking amplifier network for combining at least the amplified first, second and third drive signals to generate an output signal at a load.

Method and apparatus for an enhanced efficiency power amplifier

To address the need for a power modulator that can efficiently operate within a wideband, high-speed communication system, a method and apparatus for power modulation is provided herein. In accordance with the preferred embodiment of the present invention an envelope reference signal is filtered in such a way that the bandwidth is reduced while keeping the instantaneous level of the filtered signal is greater than the unfiltered envelope level. Because the bandwidth of the envelope signal is reduced, efficient operation of the switching modulator can be achieved within wideband, high-speed communication systems.

Power modulator and method of operating a power modulator

A voltage (Vo) is added to an envelope function and input into a switching modulator ( ). The output of the switching modulator (V ) is input to a linear regulator ( ) where amplitude compensation of V takes place and is output as V . V is then used to accomplish envelope modulation of a power amplifier ( ). The value chosen for Vo is chosen to be adequate to maintain V (t)>V (t) over all time.

Method and apparatus for power modulating to prevent instances of clipping

A multilayer ceramic device ( ) includes a plurality of dielectric layers ( A-G) separated by ground planes ( ) and includes a plurality transmission line segments ( ) in generally folded configuration for defining a tapered transmission line ( ). The profile of the transmission line may vary and includes such profiles as embodied in the depicted lines ( ).

Multilayered tapered transmission line, device and method for making the same

An amplifier apparatus for a multimode mobile communication device includes a carrier amplifier ( ) and a peaking amplifier ( ). The peaking amplifier has an adjustable bias level and is adjusted by a regulator to a predetermined level, depending on which mode of communication is selected. The bias level on the peaking amplifier is held constant so long as the mode of communication is the same. By adjusting the bias point of the peaking amplifier in conjunction with the selection of the mode of communication, the efficiency and the linearity of modulation can be optimized for the particular mode of communication.

Efficient multimode power amplifier

A power amplifier includes a carrier amplifier path and a peaking amplifier path. The carrier amplifier path includes a carrier amplifier (,), and an impedance transforming network (,). The peaking amplifier path includes a peaking amplifier (,), an impedance transforming network (,), and a phase delay quarter wave element (,). The arrangement forms an inverted Doherty combiner where as the nominal impedance at a summing node (,) increases with increased conduction from the peaking amplifier, the load impedance at the output of the carrier amplifier decreases so as to maintain the carrier amplifier at a saturation point as the input signal (,) increases, and results in a reduction of the number of phase delay elements needed over a conventional Doherty approach. In a preferred embodiment the carrier and peaking amplifiers consist of cascaded stages, and are disposed on a common integrated circuit die (,). The impedance transforming networks and phase delay element are disposed on a common substrate (,), as is an input splitter network (,).

High efficiency power amplifier having reduced output matching networks for use in portable devices

An amplifier (300) comprising two amplifier stages (301, 303), a signal splitter (305), and a signal combiner (307) amplifies an amplitude-varying input signal (128) in the following manner. The signal splitter (305) receives a signal of varying amplitude (128) and splits the received signal into a first amplitude-varying signal (325) and a second amplitude-varying signal (327). The first amplifier stage (301) applies a first gain to the first amplitude-varying signal (325). The second amplifier stage (303) applies a second gain that is greater than the first gain to the second amplitude-varying signal (327) only when an amplitude of the second amplitude-varying signal (327) exceeds a threshold. The signal combiner (307) combines the amplified signals outputted from the amplifier stages (301, 303) to produce the amplifier output signal.

Apparatus and method for amplifying an amplitude-varying signal

A high efficiency power amplifier 600 consists of a non-linear radio frequency (RF) Doherty power amplifier (67) and a linearization circuit, such as, for example, a Cartesian Feedback circuit (33), an RF feedback circuit (38), an IF feedback circuit (48), or a feedforward circuit (55). The Doherty amplification stage (67) may be implemented with a BJTs, FETs, HBTs, H-FETs, PHEMTs, or any other type power transistor technology or device.

High efficiency power amplifier

An amplifier structure (200) includes a main amplifier loop (203) for efficiently amplifying an input signal at a power amplifier (228) coupled to a load susceptible to impedance variations. The amplifier structure (200) includes a DC correction circuit (214) for detecting and correcting misadjustments in the amplifier (200) in order to eliminate DC offset associated therewith.

Digital DC correction circuit for a linear transmitter

An amplifier structure (200) includes a main amplifier loop (203) for efficiently amplifying an input signal at a power amplifier (228) coupled to a load susceptible to impedance variations. The amplifier loop (200) further includes an auxiliary loop (201) coupled to the main loop (201) for simultaneously preventing the power amplifier (228) from operating inefficiently or causing off-channel interference.

Method and apparatus for an improved linear transmitter

A linear transmitter (100), which utilizes closed loop feedback to maintain its linearity, employs a method for reducing off-channel interference produced by the linear transmitter (100). A dynamically alterable parameter source (DAPS, 126) is provided to the linear transmitter (100). The DAPS (126) is then used to adjust at least one loop parameter of the closed loop feedback such that off-channel interference is reduced.

Method and apparatus for reducing off-channel interference produced by a

A method and apparatus is provided for a transmitter (200) with a stable, linear response. The transmitter (200) includes an amplification stage (242), and a negative feedback correction loop (244) with a feedback signal (252). A reference signal (251) is combined with the feedback signal (252) to produce an error signal (253) for coupling to the amplification stage (242). Transmitter parameters are varied when a difference between the reference signal (251) and the error signal (253) exceeds a particular threshold.

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Schaumburg, IL, United States of America

Lawrence F Cygan