Motorola Corporation

Gould Inc.

Motorola Mobility LLC

Motorola Solutions, Inc.

Nippon Mining Co., Ltd.

Lawrence E Lach

Gregory Joseph Dunn

Daniel Roman Gamota

Jie Zhang

Ion V Nicolaescu

Tomasz L Klosowiak

Steven Michael Scheifers

Vernon L Brown

Paul W Brazis, Jr

Tien Lee

Robert B Lempkowski

Min-Xian M Zhang

Keryn Lian

Junhua Liu

Vincent J Tekippe

Mark A Krizik

William F Hoffman

Lillana Grajales

Mark W Cholewczynski

Mikiharu Ohoka

Ion V Nicolasescu

A laser projector display module for a handheld device may include an electronics module, a miniaturized light source module electrically connected with the electronics module, a scanner module electrically connected with the electronics module, and an optical assembly configured to direct light from the light source onto the scanner module. The scanner module and the light source module may abut the electronics module.

Laser projector display modules and arrangements of components of laser projector display modules

A method and system for monitoring physiological parameters is useful for remote auscultation of the heart and lungs. The system includes an acoustic sensor () that has a stethoscopic cup (). A membrane () is positioned adjacent to a first end of the stethoscopic cup (), and an impedance matching element () is positioned adjacent to the membrane (). The element () provides for acoustic impedance matching with a body such as a human torso. A microphone () is positioned near the other end of the stethoscopic cup () so as to detect sounds from the body. A signal-conditioning module () is then operatively connected to the acoustic sensor (), and a wireless transceiver () is operatively connected to the signal-conditioning module (). Auscultation can then occur at a remote facility that receives signals sent from the transceiver ().

Wearable auscultation system and method

A method and apparatus that projects a two-dimensional image is disclosed. The method may include emitting a laser beam, sweeping the laser beam with a first scan mirror along a first scan direction to form a scan line on the projection surface, and sweeping the scan line with a second scan mirror along a second scan direction generally orthogonal to the first scan direction to form a raster pattern of scan lines on the projection surface. The scanner for the first scan mirror is driven with a stimulus waveform, wherein the stimulus waveform has a fundamental frequency that is substantially equal to the resonance frequency of the scanner but also contains harmonics to achieve a nearly constant velocity of the laser beam spot during its scan across the projection surface. The stimulus thereby reduces peak laser output power and corresponding noise generation while maintaining image brightness and image quality.

Method to reduce RF noise generation and required peak laser output in raster scan portable projectors

A semiconductor device having a flexible or rigid substrate ( ) having a gate electrode ( ), a source electrode ( and ), and a drain electrode ( and ) formed thereon and organic semiconductor material ( and ) disposed at least partially thereover. The gate electrode ( ) has a thin dielectric layer formed thereabout through oxidation. In many of the embodiments, any of the above elements can be formed through contact or non-contact printing. Sizing of the resultant device can be readily scaled to suit various needs.

Organic semiconductor device having an oxide layer

A semiconductor device formed of a flexible or rigid substrate ( ) having a gate electrode ( ), a source electrode ( ), and a drain electrode ( ) formed thereon and organic semiconductor material ( ) disposed at least partially thereover. With appropriate selection of material, the gate electrode ( ) will form a Schottky junction and an ohmic contact will form between the organic semiconductor material ( ) and each of the source electrode ( ) and drain electrode ( ). In many of the embodiments, any of the above elements can be formed through contact or non-contact printing. Sizing of the resultant device can be readily scaled to suit various needs.

Organic semiconductor and method

A semiconductor structure for implementing optical beam switching includes a monocrystalline silicon substrate and an amorphous oxide material overlying the monocrystalline silicon substrate. A monocrystalline perovskite oxide material overlies the amorphous oxide material and a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material. An optical source component that is operable to transmit radiant energy is formed within the monocrystalline compound semiconductor layer. A diffraction grating including an electrochromic portion is optically coupled to the optical source component.

Structure and method for fabricating an electro-optic system having an electrochromic diffraction grating

A thin-film metal resistor ( ) suitable for a multilayer printed circuit board ( ), and a method for its fabrication. The resistor ( ) generally has a multilayer construction, with the individual layers ( ) of the resistor ( ) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer ( ). As a result, the resistor ( ) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor ( ) reduces the area of the circuit board ( ) required to accommodate the resistor ( ), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board ( ).

Printed circuit board with a multilayer integral thin-film metal resistor and method therefor

A thin-film metal resistor (,) suitable for a multilayer printed circuit board (,), and a method for its fabrication. The resistor (,) generally has a multilayer construction, with the individual layers (,) of the resistor (,) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (,). As a result, the resistor (,) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (,) reduces the area of the circuit board (,) required to accommodate the resistor (,), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (,).

A thick-film resistor and a process for forming the resistor to have accurate dimensions, thereby yielding a precise resistance value. The resistor generally includes an electrically resistive layer and a pair of terminals, a first of which is surrounded by the second terminal, so as to form a region therebetween that surrounds the first terminal and separates the first and second terminals. The terminals are preferably concentric, with the second terminal and the region therebetween being annular-shaped. The resistive layer electrically connects the first and second terminals to complete the resistor. Each of the terminals has a surface that is substantially parallel to an upper and/or lower surface of the resistive layer and contacts the resistive layer. The surfaces of the terminals may be embedded in the resistive layer by printing the resistive material over the terminals, or may contact the upper or lower surface of the resistive layer by locating the terminals above or below the resistive layer. In each of these embodiments, the terminals are not limited to having edge-to-edge contact with the resistive layer, such that the interfacial resistance therebetween is minimized.

Thick-film resistor having concentric terminals and method therefor

The surface-mount device package comprises a pad located on a face of the surface-mount device, a solder bump bonded to the pad, and a terminal spaced radially apart from the pad. A terminal surrounds the pad in at least one common plane that bisects the pad and the terminal. An electrically resistive volume intervenes between the pad and the terminal. The pad is electrically coupled to the terminal through the resistive volume. The terminal, the pad, and the electrically resistive volume cooperate to form a passive component associated with at least one device interconnection. The passive component preferable comprises an integral resistor. The integral resistor serves to eliminate or at least substantially reduce electrical resonances and reflections that may otherwise degrade the signal integrity.

Surface-mount device package having an integral passive component

A microelectronic assembly, such as a surface-mount device or a ball-grid array (BGA) package, has one or more integral resistors. The integral resistors are incorporated into one or more of the microelectronic assembly's electrical leads or connections. The integral resistors preferably terminate in a solderable pad. For example, the BGA package may include an IC chip and interposer. A terminal is located on a surface of the IC chip, on a surface of the interposer, or on the surface of the substrate to which the BGA is mounted. An electrically-resistive material overlies the terminal and electrically couples the terminal to a bond pad, thereby defining an integral resistor. The integral resistors reduce electrical resonances and reflections that may otherwise degrade the signal integrity and reliability of the electrical system employing the device; hence, reduce or eliminate the requirement for discrete resistors for the microelectronic assembly.

Solderable pad with integral series termination resistor

A group III-V digital logic circuit which includes either at least two enhancement type metal semiconductor field effect transistors and one load element or two first type field effect transistors having a first threshold voltage and two second type field effect transistors having a second threshold voltage, for providing a logic operation. The second threshold voltage is less than zero and is less than the first threshold voltage. The group III-V digital logic circuit can be formed as an integrated circuit on, in particular, a GaAs substrate. The field effect transistor can be either a metal semiconductor field effect transistor or a junction field effect transistor.

Cascade FET logic circuits

A gallium arsenide device converts an ECL voltage signal to a gallium arsenide voltage signal. The device has a pair of depletion transistors for transforming the ECL voltage signal and a predetermined reference voltage into corresponding signal and reference currents to provide pull-up. A pair of enhancement transistors are connected to the pair of depletion transistor for outputting the gallium arsenide voltage signal which is representative of the ECL voltage signal. Positive feedback means for increasing the gain of the pair of enhancement transistors is provided and is connected to the pair of enhancement transistors. The predetermined reference voltage may be derived from a set voltage source or may be derived from a logical one level in the ECL circuit so as to provide temperature tracking for the gallium arsenide circuit. At least a third depletion transistor is connected to a third enhancement transistor. The third enhancement transistor has a gate connected to the output of the pair of depletion transistors. The third depletion and enhancement transistors have a substantially similar structure and topology to the pair of depletion and enhancement transistors.

ECL to GaaS logic conversion circuit with positive feedback

A circuit for measuring small propagation delays associated with a digital logic circuit has first and second signal paths. The first signal path in the digital logic circuit has at least a first predetermined number of devices and has an input and an output. Similarly, the second signal path in the digital logic circuit has at least a second predetermined number of devices and also has an input and an output. The first predetermined number of devices is different than the second predetermined number of devices. An input multiplexer multiplexes a predetermined input signal to the inputs of the first and second signal paths. First and second output signals are thereby produced on the outputs of the first and second signal paths, respectively. An output multiplexer causes the output signals to be combined into a single multiplexed output signal. An average propagation delay is determined from the differential area between the output signals in the multiplexed output signal.

Growing community of inventors

Chicago, IL, United States of America

Lawrence E Lach