Adeia Semiconductor Bonding Technologies Inc.

Vertical Circuits, Inc.

Other

Lawrence Douglas Andrews, Jr

Simon J S McElrea

Terrence Caskey

Scott P McGrath

Marc E Robinson

Scott Jay Crane

Yong Du

Reynaldo Co

Zongrong Liu

Grant Villavicencio

Weiping Pan

Jeffrey S Leal

DeAnn Eileen Melcher

Loreto Cantillep

Mark Scott

Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.

Support mounted electrically interconnected die assembly

A die assembly includes a die mounted to a support, in which the support has interconnect pedestals formed at bond pads, and the die has interconnect terminals projecting beyond a die edge into corresponding pedestals. Also, a support has interconnect pedestals. Also, a method for electrically interconnecting a die to a support includes providing a support having interconnect pedestals formed at bond pads on the die mount surface of the support, providing a die having interconnect terminals projecting beyond a die edge, positioning the die in relation to the support such that the terminals are aligned with the corresponding pedestals, and moving the die and the support toward one another so that the terminals contact the respective pedestals.

Vertical electrical interconnect formed on support prior to die mount

In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.

Electrically interconnected stacked die assemblies

An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

Wafer level surface passivation of stackable integrated circuit chips

A flat leadless package includes at least one die mounted onto a leadframe and electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, an assembly includes stacked leadless packages electrically connected to leads using an electrically conductive polymer or an electrically conductive ink. Also, a package module includes an assembly of stacked leadless packages mounted on a support and electrically connected to circuitry in the support using an electrically conductive polymer or an electrically conductive ink.

Flat leadless packages and stacked leadless package assemblies

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Los Gatos, CA, United States of America

Lawrence Douglas Andrews, Jr