Cadence Design Systems, Inc.

Laurent Robert Chouraki

Arnold Ginetti

Gerard Tarroux

Laurent Rene Saint-Marcel

Jean-Marc Bourguet

Fabrice Raymond Morlat

Alexandre Roger Maurice Soyer

Carole Perrot

In an electronic circuit design system, a physical layout of at least part of an electronic circuit design is visually rendered. Magnitude of current loading are determined at one or more of the circuit nodes, or one or more clusters of nodes grouped according to predetermined clustering criteria, for a selected net or nets. The range of magnitudes is mapped to at least one gradation range for visual indicia of preselected type, such as a predetermined color spectrum; preferably, alternative gradation ranges respectively for current sources and current sinks are provided. The visual indicia of the current loading magnitudes are then adaptively displayed to overlay the corresponding circuit nodes or clusters in the rendered physical layout, providing a reference for a designer to proportionately size segments of the selected net or nets, as well as spacing required for the segments.

System and method for electronic circuit design editing having adaptive visual indicia for relative current loading of circuit layout portions

A method and system for maintaining synchronization between a plurality of layout clones of an integrated circuit design, wherein each layout clone comprises at least one figure. The method comprises tracking relationships between equivalent figures of the plurality of layout clones, wherein the plurality of layout clones are associated with one another within an equivalence group and propagating an edit made in one of the layout clones within an equivalence group to the other layout clones within the equivalence group.

Method and apparatus for maintaining synchronization between layout clones

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Mougins, France

Laurent Robert Chouraki