Stmicroelectronics S.a.

Laurent Herard

Christophe Prior

Juan Exposito

Andrea Cigada

A substrate, in particular, a multilayer substrate, includes a mounting and electrical-connection support, and a face for mounting at least one integrated circuit chip (IC chip). The substrate and the mounted IC chip are placed in an injection mold. The injection mold has two parts that surround the periphery of the substrate. One part of the injection mold defines a cavity for molding an encapsulation material thereby encapsulating the IC chip, and includes a face for bearing on the mounting face. At least one recess is provided in one part of the injection mold. The recess defines, above the mounting face, a slot for providing a vent for venting gases. The mounting face includes a region on which a metal outer layer is placed. The metal outer layer extends along the recess and on the bearing face on both sides of the recess.

Integrated circuit chip support substrate for placing in a mold, and associated method

A process for manufacturing semiconductor packages comprising, respectively, a substrate, a chip which forms an integrated circuit and is attached to one region of the substrate, electrical connection means connecting the chip to a group of external electrical connection regions lying on one face of the substrate, as well as an encapsulation encasement. The process consists in producing, in a matrix configuration, a multiplicity of groups of connection regions (104a) on a common substrate plate (102), corresponding to as many chip attachment regions (109), in attaching a chip (103) to each attachment region (109) of the common substrate plate, in electrically connecting each chip (103) to the associated electrical connection regions (104a), so as to obtain an assembly (111) consisting of the substrate plate and the connected chips. The process consists, in a second step, in placing this assembly (111) in a mold (112) and in injecting an encasement material (106) into the mold so as to obtain, in a single molding operation, a parallelepipedal block (117) and then, in a subsequent step, in cutting the said parallelepipedal block (117) through its thickness into units, each constituting a semiconductor package.

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Grenoble, France

Laurent Herard