Nxp Usa, Inc.

Freescale Semiconductor,inc.

Nxp B.v.

Laurent Bordes

Alexis Nathanael Huot-Marchand

Simon Bertrand

David Michael Schlueter

Olivier Tico

Guillaume Mouret

Carl E Wojewoda

Tristan Bosvieux

Julien Burro

Baptiste Bernardini

Transceiver for coupling to a galvanically isolated bus

The present disclosure relates to a transceiver () comprising a first and second terminal, a signal generation unit a signal generation unit () for generating a differential output voltage (Vout) between the terminals, a sensor unit () configured to measure an electric current (Iout) when flowing through one of the terminals, and a control unit () for controlling the signal generation unit, wherein the control unit is configured to control the signal generation unit during a calibration phase to generate a predetermined differential output voltage reference pattern (), wherein the sensor unit is configured to measure a calibration current unit during the calibration phase, and wherein the control unit is configured to calibrate the signal generation unit depending on the calibration current. The present disclosure also relates to a method for the transceiver.

Transceiver for transmitting and receiving signals and method for the transceiver

A pulse stretcher is disclosed comprising, a stretcher input () and a stretcher output (); an asynchronous finite state machine; and a delay generator () having a delay input connected to the stretcher output, and a delay output connected to a second input of the FSM. The asynchronous FSM comprises: a first Muller C-element gate () having an output connected to the stretcher output, a second Muller C-element gate () having an output; and a combinatorial logic circuit () connected to the stretcher input, to first and second inputs of each of the first and second C-elements. The first and second Muller C-element gates are cross-coupled via the combinatorial logic, such that the respective outputs of the C-element gates are complementary and, in response to receiving the input pulse at the stretcher input, the output of the first Muller C-element gate provides a stretched version of the input pulse.

Pulse stretcher

A battery management system comprises a first and second battery cell controllers and a transmission line providing a point-to-point signal transmission path between the first and second battery cell controllers. At least one of the first and second battery cell controllers includes a logic circuit constructed and arranged for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique. The logic circuit comprises an encoding/decoding circuit that generates a modulated signal of the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency for transmission through the transmission line and encodes a plurality of data units of the serial data stream into a data packet. The data packet includes at least three symbols constructed and arranged with at least four consecutive transmissions per symbol. Each transmission of each symbol assumes one of the three discrete signal levels. At least one transceiver is configured in a transmit mode or a receive mode and that discards any combinations of the maximum number of possible combinations to reduce a source of electromagnetic interference (EMI) on the transmission line.

Multi-level encoding for battery management system

A battery management system comprises a first battery cell controller; a second battery cell controller, the first battery cell controller and the second battery cell controller each monitoring a plurality of battery cells; and a galvanically isolated transmission line providing a point-to-point signal transmission path between the first battery cell controller and the second battery cell controller. At least one of the first battery cell controller or the second battery cell controller includes at least one encoding/decoding circuit for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique, including modulating the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency, encoding a plurality of data nibbles of the serial data stream into a data packet, the data packet including a plurality of symbols constructed and arranged with at least four consecutive chips per symbol, wherein the at least four consecutive chips per symbol of the data packet includes a DC balanced line code in each of the symbols.

Multi-level encoding for battery management system field

A controller system controls a plurality of lighting element arrays. The controller system comprises array selection module for selecting a lighting element array, voltage control module arranged to apply a voltage to at least the selected lighting element array, a common current source arranged to provide a current from the common current source to the selected lighting element array, and duty cycle control module arranged to control a ratio of the current to the selected lighting element array over a time sharing cycle. The duty cycle control module is arranged to cause the array selection module to sequentially select the lighting element arrays in accordance with a time-sharing cycle, to cause the current from the common current source to be provided to the selected lighting element array in accordance with a respective duty cycle setting, and to cause the current provided to the selected lighting element array to be compensated for a rise time of the voltage applied thereto in order to be accurate with respect to the programmed settings.

Growing community of inventors

Aucamville, France

Laurent Bordes