Massachusetts Institute of Technology

Hewlett-packard Company

Laurence G Walker

James D Sansbury

George W Pratt

James Robert Eaton

Juliana Manoliu

Charles G Sodini

Robert D Rung, Jr

A method and device are disclosed for reducing the circuit size of a class of circuits including many memory cells and logic circuits. Selected drain to bulk or source to bulk transistor junctions are made leaky. The leaky junctions perform their intended (non-leaky) functions as well as the functions of certain other circuit elements. These other elements may therefore be eliminated from the circuit.

Smaller memory cells and logic circuits

Each memory cell of an x-y addressable semiconductor memory includes a charge storage element serially connected with an I-O (bit) line through a pair of CCD-type transfer gates. One gate is responsive to x-addressing and the other gate to y-addressing. When an x-y address is selected only the charge storage element of the one selected memory cell communicates with the bit line.

X-Y Addressable memory

Luminescent semiconductor device having a wide-gap semiconductor material substrate (e.g., ZnS), a thin (.ltorsim.100A thick) alkali halide insulating layer (e.g., NaI, KI, LiI) in the substrate and a metal layer on the insulating layer such that the insulating layer is sandwiched between the substrate and the metal layer. The device emits light in the blue and in the green regions of the electromagnetic spectrum.

Luminescent semiconductor devices

A non-volatile charge storage element wherein long-term charge storage occurs in the interface states of the element. Charge is stored at low applied voltages (.ltoreq. 10 volts) in short times (.ltoreq. 1 microseconds) and is stored as long as 10.sup.5 seconds or longer. The states are emptied by exposure to radiation in the visible or the near infrared regions of the spectrum. There are described, also, an information storage device employing a plurality of such elements and a solid-stage camera wherein the image screen includes a plurality of such elements. Changes in the charge storage in each of the elements results in changes in the capacitance of the element; either the capacitance of the element or its charge state is sensed to indicate the state of the element for information storage purposes. In one embodiment, thin film techniques are employed and a change in transconductance is detected to sense the charge state.

Solid-state camera employing non-volatile charge storage elements

A non-volatile charge storage element wherein long-term charge storage occurs in the interface states of the element. Charge is stored at low applied voltages (.ltoreq. 10 volts) in short times (.ltoreq. 1 microseconds) and is stored as long as 10.sup.5 seconds or longer. The states are emptied by exposure to radiation in the visible or the near infrared regions of the spectrum. There are described, also, an information storage device employing a plurality of such elements and a solid-state camera wherein the image screen includes a plurality of such elements. Changes in the charge storage in each of the elements results in changes in the capacitance of the element; either the capacitance of the element or its charge state is sensed to indicate the state of the element for information storage purposes. In one embodiment, thin film techniques are employed and a change in transconductance is detected to sense the charge state.

Growing community of inventors

Palo Alto, CA, United States of America

Laurence G Walker