Other

Laura Sartori

Demetrio Pellicone

Marco Roveda

Adamo Corsi

Daniela Ruggeri

Giuseppe Maurizio Lorusso

A memory architecture includes a memory including a Command Set, and a serial peripheral interface (SPI) for connecting the memory to a generic host device. The SPI includes a data in line for supplying output data from the host device to inputs of the memory; a data out line for supplying output data from the memory to input of the host device; a clock line driven by the host device; and an enable line that allows the memory to be turned on and off by the host device. The memory is a NAND Flash Memory. The SPI includes an I/O registers block, including an SPI label register and a data register for driving separately data, commands and addresses directed to the memory from the corresponding SPI label registers.

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Occhiobello (RO), Italy

Laura Sartori