Xelerated Ab

Lars-Olov Svensson

Joachim Roos

Gunnar Nordmark

Par Westlund

Thomas Stromqvist

Pär Westlund

Thomas Strömqvist

Peter Holm

Method in a pipeline processing stage in a processor, includes the steps of: receiving a first block from a first register and a first execution parameter associated with the first block from a second register, the execution parameter having a first value; inspecting a set of data being at least a part of the first block; and, if the set of data differs from a predetermined condition, storing a second execution parameter on a third register and a third execution parameter on the second register, where the second execution parameter has a second value and is associated with the first block and the third execution parameter has the first value and will be associated with a second block. The invention also relates to the pipeline processor, a module, an integrated circuit and a computer unit.

Method and apparatus for processing blocks in a pipeline

Apparatus () for processing pipelined data, comprises a storage unit and at least one logic unit () for executing operations on a block () of data. The storage means comprises an instruction table () comprising at least one instruction, and the at least one logic unit () is in at least one pipelined processing stage adapted to receive the block () and a first instruction () of the at least one instruction and execute the first instruction (). The invention also relates to a method for processing pipelined data, a module () for processing pipelined data, an integrated circuit (), a circuit board assembly (), a computer unit () and a pipelined processing system.

Apparatus and method for processing pipelined data

Growing community of inventors

Stockholm, Sweden

Lars-Olov Svensson