Intel Mobile Communications Gmbh

Intel Corporation

Apple Inc.

Intel Deutschland Gmbh

Intel Mobile Communications Technology Dresden Gmbh

Lars Melzer

Volker Aue

Thuyen Le

Axel G Huebner

Tian Yan Pu

Kay Hesse

Uwe Pross

Thomas Ilnseher

Chenbo Liu

A communication device is described including a memory, a receiver configured to receive data via a communication channel and a controller configured to determine whether the communication device is to request a retransmission for the received data, to store the received data in the memory if the communication device is to request a retransmission for the received data and to prevent storing of the received data in the memory if the communication device is to omit a request for a retransmission for the received data.

Communication device and method for storing data

Embodiments include apparatuses, methods, and systems for determining a power consumption of a circuit block in an integrated circuit. The integrated circuit may include first and second power supply networks. In some embodiments, the integrated circuit may include a plurality of instances of a circuit block under test. A first instance of the circuit block may be coupled to the first power supply network during a first test run, and a second instance of the circuit block may be coupled to the second power supply network during a second test run. In other embodiments, a single instance of a circuit block under test may be coupled with the first power supply network during a first test run and coupled with the second power supply network during a second test run. The power consumption of the circuit block may be determined based on the first and second test runs.

Integrated circuit with on-chip power profiling

The invention relates to a circuit arrangement and to a method for testing same. A circuit arrangement is provided that includes a plurality of functional units which are coupled by at least one streaming data bus. Each of the functional units includes a plurality of hardware modules and a switch matrix. At least one of the streaming data busses is provided with a data width of at least that of the widest hardware module of any of the functional units of the circuit arrangement. The switch matrices are configurable to establish a streaming data path between and through the plurality of functional units which is used as a test link for any of the hardware modules of the circuit arrangement. The invention provides for non-intrusive real-time tracing in SoCs with a minimum of additional hardware resources and at low cost in terms of die size and power consumption.

Circuit arrangement and method for testing same

A clock domain separation device and a method for operating the device is provided for separating two clock domains of a bus system in a system-on-chip (SoC). The clock domain separation device is a hardware module that acts as a guarding between the two clock domains that contain either bus end, and is generally applicable with handshake-type bus protocols. The clock domain separation module allows for each clock domain to switch its clock on and off independently from the state of the other clock domains, without risking data loss or protocol violation.

Circuitry system and method for connecting synchronous clock domains of the circuitry system

A data transfer method is provided which includes: sending a stream of data elements from a source to a sink (controlled by a common clock); simultaneously with the sending of the data element stream, sending a first binary signal to the sink, where the first binary signal is low if a data element is to be ignored by the sink, and is otherwise high; simultaneously with the sending of data element stream, sending a second binary signal from the sink to the source, where the second binary signal is low if the data element is not accepted by the sink, and is otherwise high; and simultaneously with the sending of the data element stream, sending a third binary signal to the sink, where the third binary signal marks a beginning and an end of a logical group of data elements within the data element stream.

Method for high speed data transfer

A modem device for use in a wireless communications terminal comprises a plurality of functional units to perform signal processing tasks which are connected in a ring structure. Each of the functional units comprises a local processor, a plurality of hardware accelerators and a switching matrix connected between a data input of the respective functional unit and each of the sub-components. The local processor receives task instructions from a controller of the modem device over a first bus system that uses a first protocol which includes addressing, and in response to the task instructions configures the hardware accelerators and switches the switching matrix to selectively produce connections between the data input and the hardware accelerators in a manner to perform the intended task. Data flow occurs in a ring structure between said functional units and through each of the functional units using a second protocol without addressing.

Growing community of inventors

Dresden, Germany

Lars Melzer