Sperry Corporation

Unisys Corporation

Larry J Miller

Clifford T Johnson

Glen D Rattlingourd

Richard K Wells

Ronald B Tippetts

Dan M Griffin

An improved interface arrangement between an antenna controller and one or more antennas. The interface includes a reduced number of control lines but is capable of handling complete interface requirements including control and status between the antenna controller and the antenna.

Antenna interface common module

A high rate multiplexing system which is capable of operating on multiple channels while ensuring synchronization of the system operation. The system includes a basic timing network for synchronizing the system operation. Automatic phase adjusters are used to re-align data signals with a clock signal whenever data transitions occur while the data is being sampled. Synchronizing circuits are used to insert synchronization data bits into the multiplexed data streams where appropriate. A medium rate multiplexer generates two different data streams, certain clock signals and strobe signals. A higher rate multiplexer is capable of operation in different modes, including but not limited to wideband operation or narrow band operation. A Manchester encoder combines data output signals into a single aggregate data stream.

High rate multiplexer

A multiplexer system which operates as a standard multiplexer as well as a proportional multiplexer by providing typical multiplexing operation by one circuit portion and proportional multiplexing operation by other portions of the circuit wherein the multiplexer system can interface with a plurality of users or user devices in such a way that data streams between the user devices and the multiplexer system can be reallocated so as to enhance data transfer irrespective of the clock-to-data relationship such that no data is lost during circuit operation. The proportional MUX can be selectively controlled by a microprocessor.

Standard/proportional multiplexer

A system for synchronizing information bits to any frequency signal chain with low jitter correction and adapted for gate array implementation.

Bit sync generator

A synthesizer circuit which generates a family of independent clock signals from multiple input clock signal sources under microprocessor control.

Growing community of inventors

South Jordan, UT, United States of America

Larry J Miller