International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Larry G Pymento

Tony Carl Sass

Paul Andrew Wormsbecher

Willie Theodore Davis, Jr

Paul Daniel Kangas

Mark Elliot Andresen

Wilson Velez

Michk Huang

Derek Robertson

William T Byrne

Celeste Zippetelli

Leslie M Garrett

A land grid array (LGA) includes a grid array of metal pads plated directly onto a printed circuit board, and a discrete metal pad soldered to each of the plated metal pads in the grid array. Each discrete metal pad has an exposed contact surface after soldering, and a thickness of each discrete metal pad is selected as a function of location in the grid array so that the discrete pads provide a locus of exposed surfaces having greater flatness than the printed circuit board.

Land grid array interconnect formed with discrete pads

An apparatus includes a top plate and an extension card surrounding a space for a small electronic assembly. The extension card and small electronic assembly are mounted to the top plate. The apparatus includes a plurality of test probes extending through the top plate and moving relative to the top plate. A portion of the test probes are positioned to contact the extension card and a portion are positioned to contact the small electronic assembly when the test probes move with respect to the top plate. The apparatus includes a vacuum box in contact with the top plate and surrounding the extension card and small electronic assembly. The top plate moves relative to the test probes so the test probes contact the extension card and the small electronic assembly in response to a vacuum force evacuating an area under the top plate and within the vacuum box.

Method to improve strain rate control of small lead free printed circuit board assembly during in circuit test process

An apparatus for a component rework nozzle includes a nozzle with a proximal end spaced apart from a distal end along an axis. The proximal end is sized to partially enclose a component during a component rework process. The component is disposed on a substrate by way of a plurality of solder joints. The apparatus includes an indentation defined in a side of the nozzle. The side of the nozzle is parallel to the axis. The indentation is shaped to maintain a separation between the nozzle and a neighboring component. The neighboring component is disposed adjacent to the component on the substrate. The apparatus includes a plurality of notches disposed on the proximal end of the nozzle. The plurality of notches are formed to balance heat distribution, during the component rework process, across the component.

Component rework nozzle

Embodiments of the invention relates to a process and assembly for a dual sided and staggered connector arrangement on a substrate. Surface mount connector technology is employed to enable a flush connection of connector leads to the surface of the substrate. Retaining pins are provided with each connector and are sized to be received by the substrate, but not to extend through the substrate. The retaining pins are sized and configured to hold each connector in a set position, while mitigating interference with an opposing side of the PCB.

Dual side staggered surface mount dual in-line memory module

A land grid array (LGA) and a method of forming the LGA are disclosed. The method comprises plating a printed circuit board to form a grid array of copper pads, and soldering a discrete pad over each of the plated copper pads in the grid array. The discrete pad is a solid object that can be handled and positioned independent of other discrete pads. Optionally, the method may further comprise measuring variations in flatness of the printed circuit board as a function of location in the grid array, and selecting individual discrete pads that each have a thickness selected for use at a particular location in the grid array so that the discrete pads provide a locus of exposed surfaces having greater flatness than the printed circuit board.

Method of forming a land grid array with discrete pads

A modified 0402 footprint for a PCB, including: at least two padstacks each having a minimum area consistent with the 0402 standard; and each padstack modified on at least two corners such that the padstack's footprint can be placed beneath a ball grid array ('BGA'), the BGA having approximately a 1 millimeter pitch, and such that the padstack may be placed at least at a minimum distance away from a closest via in the PCB, wherein each padstack has a trace to a via not directly under a padstack in the PCB and each padstack has no via within the padstack.

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Cary, NC, United States of America

Larry G Pymento