Intel Corporation

Digital Equipment Corporation

Terarecon, Inc.

Ati Technologies Ulc

Hewlett-packard Development Company, L.p.

Other

Compaq Computer Corporation, Inc.

Mitsubishi Electric Research Laboratories, Inc.

Ati Technologies Inc.

Ati International Srl

Larry D Seiler

Robert C Rose

James L Pappas

Joel James McCormack

Norman Paul Jouppi

Hugh C Lauer

Robert Stephen McNamara

Charidimos E Gasparakis

Christopher C Gianos

Prasoonkumar Surti

Stephen L Morein

Laurent Lefebvre

James M Knittel

Vikram Simha

Kenneth W Correll

Prosun Chatterjee

Vishal C Bhatia

Steven Spangler

Adam Z Leibel

James T Claffey

Aditya Navale

Keith Farkas

Ronald N Perry

Robert M Toth

Marco Salvi

Franz Petrik Clarberg

Tomasz Janczak

Aaron Eliot Lefohn

Richard C Waters

Paul Albert Lalonde

Thouis R Jones

Benjamin Pletcher

Kiril Vidimce

Joy Chandra

Michael Doggett

Andrew V Hoar

Jeffrey Lussier

Mark O Yeager

William H Matthews

Pamela L Levesque

Jocelyn Houle

Yin Wu

Systems and methods may provide for receiving a pixel shader and sending the pixel shader to shader bypass hardware if the pixel shader and a render target associated with the pixel shader satisfy a simplicity condition. In one example, the shader bypass hardware is dedicated to pixel shaders and associated render targets that satisfy the simplicity condition.

Dedicated hardware unit to offload blending of values from memory

A mechanism is described for facilitating increased precision in large mip-mapped stitched textures for graphics computing devices. A method of embodiments, as described herein, includes detecting a stitched texture associated with a first frame of contents associated with an application, and a first region of interest in the stitched texture, where the stitched texture includes a mip-mapped stitched texture associated with multiple mip-levels in a mip-chain. The method may further include defining, at a first mip-level, a tile offset at a position within the first region of interest, where the first mip-level corresponds to the first frame. The method may further include creating or modifying a view of the stitched texture to specify the tile offset, and rendering the stitched texture as a normal texture with a full sub-texel precision.

Facilitating increased precision in mip-mapped stitched textures for graphics computing devices

Described herein are computer graphics technologies to facilitate effective and efficient memory handling for blocks of memory including texture maps. More particularly, one or more implementations described herein facilitates hierarchical lossless compression of memory with null data support for memory resources, including texture maps. More particularly still, one or more implementations described herein facilitates the use of meta-data for lossless compression and the support of null encodings for Tiled Resources. This technology also permits use of the fast-clear compression method, where meta-data specifies that the entire access should return some specified clear value.

Hierarchical lossless compression and null data support

Described herein are technologies related to facilitate lossy compression for multi-sample color data of computer graphics that maximizes the apparent quality of pixels while avoiding a corresponding burden on memory and processor bandwidth.

Bandwidth-efficient lossy fragment color compression of multi-sample pixels

Described herein are technologies related to facilitate lossless compression for multi-sample color data of computer graphics that maximizes the apparent quality of pixels while avoiding a corresponding burden on memory and processor bandwidth.

Bandwidth-efficient lossless fragment color compression of multi-sample pixels

Memory resources that are stored in GPU-specific formats may be accessed as linear arrays by CPU applications. Shared virtual memory (SVM) support enables closer CPU/GPU interaction. This creates a need to efficiently access graphics data using SVM. CPU page mapping and memory management hardware may perform the address/data swizzling and tiled rendering translations required for GPU memory formats. As a result, CPU applications can access GPU resources as if they are stored in a linear array, while also using shared virtual memory.

Mapping graphics resources to linear arrays using a paging system

A method includes computing an anisotropic filter with a major-axis and a minor-axis for a pixel to be displayed on screen-space, where the anisotropic filter is to be applied to corresponding MIPs on a texture map. Additionally, the method includes varying the length of the major-axis of the anisotropic filter based on the angle of the major-axis of anisotropy with respect to the screen space. Further, the method includes determining a number of texels from the texture map that are to be sampled in the anisotropic filter based on the length of the modified major-axis. The color of the pixel may be determined based on the texels sampled in the anisotropic filter.

Angle-dependent anisotropic filtering

Described herein are technologies related to facilitating lossy compression for multi-sampled depth data of computer graphics that maximizes the apparent quality of pixels while avoiding a corresponding burden on memory and processor bandwidth. The technologies described herein provide high-quality multi-sampling for pixels or groups of pixels that are covered by a small number of triangles, and provides a guaranteed minimum quality for pixels that are covered by a large number of triangles.

Lossy depth compression of multi-sample pixels

Described herein are technologies related to facilitate high precision and resolution of a depth (Z) buffer storage during a process of rendering 3D scenes. More particularly, during an interpolation, encoding, and/or storing processes in a graphic pipeline for rendering the 3D scenes, a particular depth (Z) plane representation is configured to support an un-normalized depth and a floating point depth formats that may be used to store Z values to the Z buffer storage.

Planar depth representations for block compression

The adverse affects of using out-of-bounds texels for bilateral interpolation may be reduced by redefining the valid texel domain as having four corners defined at the centers of four corner texels. As a result, the texels around the periphery of the valid texture domain are partial texels, with the corner texels being one quarter of a texel and the edges being half of a texel.

Corner texel addressing mode

In an embodiment, a processor includes logic to provide a first virtual address of first data stored in a memory at a first physical address. The memory includes pages of a memory allocation unit page size. The processor also includes translation logic to access the first data via a first virtual to physical address translation that includes a first hierarchy of page translation tables to map to a first page having a first page size that is smaller than the memory allocation unit size. Other embodiments are described and claimed.

64KB page system that supports 4KB page operations

Methods and systems may provide for identifying a plurality of subject commands that reference a common screen location and access a read/write resource, and serializing the plurality of subject commands according to a predefined order. Additionally, execution of the plurality of subject commands may be deferred until one or more additional commands referencing the common screen location are executed. In one example, the plurality of subject commands are serialized in response to a serialization command.

Serialized access to graphics resources

In accordance with some embodiments, multi-sampling may be used together with texture filtering and particularly texture filtering that generally uses rectangular grids of samples. This is accomplished by performing the texture filtering before doing the resolve, while conventionally the resolve is done and then the texture filtering is done. In addition, each sample is filtered as if it were the only sample.

Filtering multi-sample surfaces

A method includes computing an anisotropic filter with a major-axis and a minor-axis for a pixel to be displayed on screen-space, wherein the anisotropic filter is to be applied to corresponding MIPs on a texture map. Additionally, the method includes varying the length of the major-axis of the anisotropic filter based on the angle of the major-axis of anisotropy with respect to the screen space. Further, the method includes determining a number of texels from the texture map that are to be sampled in the anisotropic filter based on the length of the modified major-axis. The color of the pixel may be determined based on the texels sampled in the anisotropic filter.

Growing community of inventors

Boylston, MA, United States of America

Larry D Seiler