U.S. Philips Corporation

North American Philips Corporation

Philips Electronics North America Corporation

Larry D Johnson

Jon Paul Vogel

Spyros Bournias

Jeffrey Reed Lukkarila

Timothy J Gardner

Robin B Rumbolt

Stephen T Troemel

Cuong V Luu

Joseph W Memory, Jr

Anthony F Prudic

An interface system for a television receiver includes an interface connector having a plurality of contacts connected to various component circuits in the television receiver. In order to provide various functions for the television receiver, the interface system includes various circuit boards each having a plug connectable with the interface connector. The plug includes a number of contacts equal to or less than the plurality of contacts in the interface connector. A particular embodiment of one of the circuit boards includes circuitry for connecting the television receiver to an interconnecting network and for enabling a user to send and receive electronic mail messages using a remote control transmitter for the television receiver.

Interface system for a television receiver

An interface system for a television receiver includes an interface connector having a plurality of contacts connected to various component circuits in the television receiver. In order to provide various functions for the television receiver, the interface system includes various circuit boards each having a plug connectable with the interface connector. The plug includes a number of contacts equal to or less than the plurality of contacts in the interface connector. A particular embodiment of one of the circuit boards includes circuitry for connecting the television receiver to an interconnecting network and for enabling the television receiver to control, and to be controlled by, another television receiver also connected to the interconnecting network.

An interface system for a television receiver includes an interface connector having a plurality contacts connected to various component circuits in the television receiver. In order to provide various functions for the television receiver, the interface system includes various circuit boards each having a plug connectable with the interface connector. The plug includes a number of contacts equal to or less than the plurality of contacts in the interface connector. Depending on the desired function, the circuit board further includes circuits for providing the function, these circuits being interconnected and connected to the appropriate contacts in the plug for connecting with the appropriate component circuits in the television receiver. The interface system allows the television receiver functions to be modified and/or updated without the need for opening the television and modifying the circuits and/or the wiring to the circuits.

A circuit for horizontally displaying a first standard aspect-ratio television picture and a reduced-size second standard aspect-ratio television picture on a wide aspect-ratio television display includes a first and a second video signal supply and a circuit for selecting one of the video signals as the first standard aspect-ratio television picture and the other of the video signals as the second standard aspect-ratio television picture. The video signal for the first standard aspect-ratio television picture is then time compressed while the video signal for the second standard aspect-ratio television picture is initially sub-sampled to reduce the size of the resulting television picture and is then time compressed. These two compressed video signals are then selectively applied to the wide aspect-ratio television display so that the reduced-size second standard aspect-ratio television picture appears beside the first standard aspect-ratio television picture.

Picture out of picture feature for wide-screen display

The write clock controlling operation of the PIP circuitry (e.g. the analog digital converter in the PIP channel) utilizes a clock signal source having a substantially higher frequency (preferably six times) the desired write clock frequency. This clock signal is applied to a divide by six circuit which has a cycle reset controlled by the horizontal synchronization signal of the incoming PIP signal. The write clock signal furnished by this arrangement has the correct rate for sampling the incoming PIP video information and is pseudo line locked to the PIP horizontal synchronization signal.

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Knoxville, TN, United States of America

Larry D Johnson