Dell Products Inc.

Lan Zhang

Abeye Teshome

Stephanus Saputro

Ray Wang

Power supplied to an information handling system electronic component through a circuit board has component package inductance parasitic effects compensated by configuring connections to the electronic component to have increased parasitic capacitance. For instance, power and ground vias that connect a processor to power and ground planes of the circuit board are aligned to create a desired parasitic capacitance that reduces the impact of parasitic inductance relating to signal compensation, power delivery and high speed decoupling. The desired distributed capacitance is modeled by altering the radius associated with the equivalent line charge of the power via, the distance associated with the line charges between power and ground vias, and the via barrel length.

System and method for capacitive coupled via structures in information handling system circuit boards

The disclosure relates to a method for calculating electromagnetic radiation emitted by a computer system. The method models the characteristic radiation from a central processing unit as a modulated Gaussian pulse. The method solves Maxwell's equation using finite differences in the time domain. After solving Maxwell's equation the method determines if the radiation emitted by the heat sink is capacitively coupled to the radiation emitted by the remaining components of the computer system. The method also determines whether radiation emitted by the heat sink is inductively coupled to the radiation emitted by the remaining components of the computer system. Finally, the method uses a fast Fourier transform to translate time domain data to the frequency domain. The method also teaches using a computer system, with instructions coded on a computer readable medium to make the calculations described.

Calculation of radiation emitted by a computer system

An information handling system that includes a circuit board for mounting and coupling components of the information handling system. The circuit board includes a trace, a via coupled to the trace, and a cutout region surrounding the via and having a first diameter selected to minimize a loading effect of a via on a signal conveyed on the trace.

System and method for minimizing a loading effect of a via by tuning a cutout ratio

The inductance of the capacitor is reduced by connecting the capacitor directly to a via. In one embodiment inductance of a capacitor is reduced by a plurality of via, the number of via greater than the number of electrical couplings from the voltage pad to the voltage plane. In one embodiment the capacitor has a ground pad of a minimum size. In another embodiment the capacitor is electrically coupled to a trace having a length reduced to minimize inductance.

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Austin, TX, United States of America

Lan Zhang