Delta Electronics (shanghai) Co., Ltd

Lan Wei

Jianping Ying

Jianfei Zheng

Jun Wei Zhang

Zhiming Hu

Dingkun Shen

Wei Xie

Wei Tian

Yang Liu

Bingjie Liu

Binbin Dong

Wei Xu

A hybrid compensation system is electrically connected between a power grid and a load. The hybrid compensation system includes an active filter, a passive filter and a control unit. The active filter generates an output current. The active filter includes a switching circuit, a DC bus capacitor and a filtering inductor. The control unit includes a voltage controller, a first reactive current detector, a harmonic current compensator, a current loop controller and a modulator. The voltage controller generates a first current given signal according to a bus voltage of the DC bus capacitor and a reference voltage. The first reactive current detector generates a second current given signal. The harmonic current compensator generates a third current given signal. The current loop controller generates a control signal. The modulator generates a driving signal according to the control signal.

Hybrid compensation system and control method thereof

A control method of a multilevel converter includes: classifying power modules that start working, need to update an output state or stop working to form m power module groups; and controlling power modules in a same one of the power module groups to start working, update the output state or stop working at the same time, and sequentially controlling the m power module groups to start working, or update the output state or stop working, according to a preset time interval. The number of power modules in each power module group is less than or equal to a preset value, causing a change value of an output level of the each power module group to be less than or equal to a preset voltage value.

Control method of multilevel converter and the multilevel converter

A driving method for power semiconductor switches in an H-bridge circuit is provided. The method includes: calculating a start time and an end time of a zero level of an output voltage and determining a zero level section based on the start time and end time of the zero level; and driving an upper power semiconductor switch of a first bridge arm and an upper power semiconductor switch of a second bridge arm to be on simultaneously or driving a lower power semiconductor switch of the first bridge arm and a lower power semiconductor switch of the second bridge arm to be on simultaneously in the zero level section.

Driving method for power semiconductor switches in H-bridge circuit

A hybrid topology power converter includes a three-level circuit module and a cascaded H-bridge circuit module. A control method includes the following steps. Firstly, a zero sequence component is injected into a total modulation wave, thereby generating a compensated total modulation wave. Then, a first voltage signal is generated according to the compensated total modulation wave. An H-bridge modulation wave is generated according to the compensated total modulation wave and the first voltage signal. A three-level driving signal is generated according to the first voltage signal, and an H-bridge driving signal is generated according to the H-bridge modulation wave. A duty cycle of at least one switch element of the three-level circuit module is adjusted according to the three-level driving signal. A duty cycle of at least one switch elements of the cascaded H-bridge circuit module is adjusted according to the H-bridge driving signal.

Hybrid topology power converter and control method thereof

A pre-charge control method for a hybrid multilevel power converter comprises steps of: (a) controlling access of the current-limiting resistor unit, limiting current from the AC power via the current-limiting resistor unit, and outputting the current; (b) controlling the second capacitor unit to bypass, and charging the first capacitor unit; (c) controlling the access of the second capacitor unit when the first capacitor unit is charged to a third preset voltage, and charging the first and second capacitor units at the same time; (d) controlling the first capacitor unit to bypass when the second capacitor unit is charged to a fourth preset voltage, or the first capacitor unit is charged to a first preset voltage, and charging the second capacitor unit; and (e) controlling the access of the first capacitor units and the current-limiting resistor unit to bypass when the second capacitor unit is charged to a second preset voltage.

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Shanghai, China

Lan Wei