Taiwan Semiconductor Manufacturing Comp. Ltd.

Lan-Hsin Chiang

Wei-De Ho

Hua-Tai Lin

Szu-Ping Tung

Han-Wei Wu

Meng-Jung Lee

Pei-Sheng Tang

Chung-Te Lin

Chien-Hua Huang

Kai-Chieh Liang

Sheng-Yuan Chang

Yung-Yu Wang

A method for evaluation of thin film non-uniform stress using high order wafer warpage, the steps including measuring a net wafer warpage across a wafer area due to thin film deposition, fitting a two dimensional low-order polynomial to the wafer warpage measurements and subtracting the low-order polynomial from the net wafer warpage across the wafer area.

Method for evaluating non-uniform stress

Structures and formation methods of a semiconductor structure are provided. The semiconductor structure includes an insulating layer covering a device region and an alignment mark region of a semiconductor substrate. A conductive feature is formed in the insulating layer and corresponds to the device region. An alignment mark structure is formed in the first insulating layer and corresponds to the alignment mark region. The alignment mark structure includes a first conductive layer, a second conductive layer covering the first conductive layer, and a first magnetic tunnel junction (MTJ) stack layer covering the second conductive layer. The first conductive layer and the conductive feature are made of the same material.

Alignment mark for MRAM device and method

Thin-film non-uniform stress evaluation

Growing community of inventors

Hsinchu, Taiwan

Lan-Hsin Chiang