Cisco Technology, Inc.

Lambert Fong

Gene K Chui

Eugene T Wang

A method and apparatus for providing programmable memory functions for bi-directional cell traffic in a switch platform are provided, wherein a parameterized bi-directional FIFO unit controls cell traffic in a switch platform using a first and a second unidirectional FIFO buffer. The first and second unidirectional FIFO buffers each comprise asynchronous read and write ports. A cell size and a word size of the first and second unidirectional FIFO buffers are programmable. The bi-directional FIFO unit is coupled to write at least one cell from and read at least one cell to at least one asynchronous transfer mode (ATM) interface, at least one frame relay interface, at least one voice interface, and at least one data interface. As such, the first unidirectional FIFO buffer is coupled to write at least one cell from, and the second unidirectional FIFO buffer is coupled to read at least one cell to an ATM interface, a frame relay interface, a voice interface, and a data interface. The first unidirectional FIFO buffer is coupled to read at least one cell to at least one switch, and the second unidirectional FIFO buffer is coupled to write at least one cell from at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch is coupled to route the at least one cell between an OC12 trunk line and at least one service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, OC3, and OC 12 ports.

Method and apparatus for providing programmable memory functions for bi-directional traffic in a switch platform

A method and apparatus for rate-based cell traffic arbitration in a switch are provided, wherein arbitration is provided between eight traffic sources in the form of eight cell bus service modules on the same cell bus. A cell bus controller (CBC) is programmed with an 8-bit Relative Service Delay (RSD) value for each of the eight service modules. The value for each RSD is calculated based on the bandwidths allotted for each service module. This RSD value determines the portion of the total bandwidth of the switch platform reserved for the respective service module. Furthermore, each service module uses an 8-bit Service Delay Accumulator (SDA) register. The SDA register of each service module is configured using an SDA value, wherein the SDA register keeps track of when each of the service modules should receive service. The SDA value is calculated at each cell bus frame time for each of the service modules based on the RSD value for each of the service modules, a request for service, and the minimum SDA value among the service modules during a cell bus frame time. If the bandwidth is under-subscribed, the remaining bandwidth is shared among all eight service modules according to the RSD value of each service module. If the bandwidth is over-subscribed, each service module will have the assigned bandwidth portion decreased according to the RSD values.

Method and apparatus for rate-based cell traffic arbitration in a switch

A method and apparatus for routing cells having different formats among service modules of a switch platform are provided. The cells are routed among service modules of a switch by a cell bus controller (CBC) using a first memory to convert an address having a first format into an address having a second format. The address having the first format is received in a header of a cell, and the address format comprises a 17-bit cell bus logical connection number of a destination port. The address having the second format is a 16-bit UDF used by a switch of the switch platform. The address having the first format is used to form a third address that is used to access the first memory. The data located at the third address of the first memory is a 16-bit UDF used to address the switch. A second memory is used to convert an address having the second format into an address having the first format. The address having the second format is used as a fourth address to access the second memory. The data located at the fourth address of the second memory is a 32-bit cell bus header that addresses a destination port. The destination port is at least one service module of the switch platform. The first and second memory comprise an external random access memory.

Method and apparatus for routing cells having different formats among service modules of a switch platform

A method and apparatus for providing cell bus management in a switch platform are provided. Each unidirectional FIFO buffer of a cell bus controller outputs a write port cell count from a write port. A cell count value is programmed at which the write port cell count is outputted. When the write port cell count indicates that the FIFO buffer can not accept additional data or cells, a master bidirectional FIFO unit ceases reading cells to a unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to the write port cell count. Furthermore, the master bidirectional FIFO unit disables a corresponding switch from routing cells to the slave bidirectional FIFO unit in response to the write port cell count; the switch routes the cells to another of the slave bidirectional FIFO units. The master bidirectional FIFO unit resumes reading cells to the second unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to a write port cell count indication that the FIFO buffer can accept additional data or cells. In response, the master bidirectional FIFO unit enables an associated switch to route cells to the slave bidirectional FIFO unit.

System for providing cell bus management in a switch platform including a write port cell count in each of a plurality of unidirectional FIFO for indicating which FIFO be able to accept more cell

A method and apparatus for providing asynchronous memory functions for bi-directional cell traffic in a switch platform are provided, wherein a parameterized bi-directional FIFO unit controls cell traffic in a switch platform using a first and a second unidirectional FIFO buffer. The first and second unidirectional FIFO buffers each comprises asynchronous read and write ports. A cell size and a word size of the first and second unidirectional FIFO buffers are programmable. The bi-directional FIFO unit is coupled to write at least one cell from and read at least one cell to at lest one asynchronous transfer mode (ATM) interface, at least one frame relay interface, at least one voice interface, and at least one data interface. As such, the first unidirectional FIFO buffer is coupled to write at least one cell from, and the second unidirectional FIFO buffer is coupled to read at least one cell to an ATM interface, a frame relay interface, a voice interface, and a data interface. The first unidirectional FIFO buffer is coupled to read at least one cell to at least one switch, and the second unidirectional FIFO buffer is coupled to write at least one cell from at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch is coupled to route the at least one cell between an OC12 trunk line and at least one service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, TC3, and OC 12 ports.

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Fremont, CA, United States of America

Lambert Fong