Lsi Corporation

Avago Technologies General IP (Singapore) Pte. Ltd.

Lakshmana M Anupindi

Moby J Abraham

Brian Skinner

James A Rizzo

Jason M Stuhlsatz

Luke Everett McKay

Mark J Jander

Naman Nair

Brandon L Hunt

Debal Krishna Mridha

Kakanuru Lakshmi Kanth Reddy

R Brian B Skinner

Brad D Marshall

R Brian Skinner

A redundant array of independent drives controller and board controlled cache off-loading during a power failure is described. Methods associated with the use of the redundant array of independent drives controller and board for controlled cache off-loading during a power failure are also described.

Control logic design to support USB cache offload

Methods and structure for enabling re-training of a DDR memory controller in a storage device without loss of data in the DDR memory devices of the cache memory in response to detecting failure of the memory subsystem during operation of the storage device. In response to detecting a failure of the memory subsystem, the memory controller is reset without resetting the memory devices. The memory controller is then re-trained for operation with the memory device. During the re-training, self-refresh mode of the memory devices is disabled and manual refresh is performed by a processor of the storage device to thereby retain any user data in the memory device.

Methods and structure to assure data integrity in a storage device cache in the presence of intermittent failures of cache memory subsystem

A controller is provided that receives a single enclosure management (EM) serial bit stream from an expander or other device and divides the EM serial bit stream into multiple EM serial bit streams for delivery to multiple respective midplanes or backplanes. In this way, a separate EM serial bit stream is provided to each midplane or backplane without having to increase the number of ports that are available on the expander or other device that interfaces with the backplane or midplane.

Method and apparatus for dividing a single serial enclosure management bit stream into multiple enclosure management bit streams and for providing the respective bit streams to respective midplanes

Embodiments of the invention include a device and method for improved battery learn cycles for battery backup units within data storage devices. The backup unit includes a first battery pack, a corresponding charge capacity gauge, one or more second battery packs, a corresponding charge capacity gauge, and a controller switch configured to select only one battery pack for a learn cycle at any given time. The charge capacity gauges are such that, at the end of the learn cycle discharge phase, the depth of discharge of the learn cycle battery pack is such that the charge capacity of the learn cycle battery pack combined with the full charge capacity of the remaining battery packs is sufficient for the device cached data to be off-loaded to a physical data storage device, and the data storage device does not have to switch from a write-back cache mode to a write-through cache mode.

Device and method for improved battery condition learn cycle

The present invention concerns an apparatus comprising a charger circuit and a control circuit. The charger circuit may be configured to generate a first power down control signal and a second power down control signal in response to (i) a first charge signal, (ii) a second charge signal, (iii) a supply voltage, and (iv) a host control signal. The control circuit may be configured to generate the first charge signal and the second charge signal in response to a first battery signal and a second battery signal. The control circuit may enter a power down state in response to the host control signal initiating the power down state.

Battery backup system with sleep mode

The present invention is a Battery Backup Unit (BBU) Assembly. The BBU Assembly may include a Printed Circuit Board (PCB). The BBU Assembly may further include a protection circuit connected to the PCB. The BBU Assembly may further include a battery pack connected to the PCB. The battery pack may include a plurality of Lithium-ion (Li-ion) cells. The battery pack may be configured as a 2-cell series stack, a 3-cell series stack, or a 4-cell series stack. The BBU Assembly is configured for electrically connecting the battery pack to the protection circuit.

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Suwanee, GA, United States of America

Lakshmana M Anupindi