Maxtor Corporation

Sandisk Enterprise IP LLC

Seagate Technology Incorporated

Smart Storage Systems, Inc.

Lace J Herman

Robert W Ellis

Bobby Ray Southerland

John Charles Purkett

Jin-Hong Hsueh

Gregg Steven Lucas

Kenneth B Delpapa

Steven Scott Williams

Abhay Tejmal Kataria

Jerry Moline

Rajita Shrestha

Chris Aumann

Keow Seng Ng

Glen Rewerts

Vincent Michael McGarry

Dave Rewerts

Dennis A Rubsam

The various implementations described herein include systems, methods and/or devices used to enable power sequencing and a data hardening module in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is lower than an under-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is lower than the under-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.

Power sequencing and data hardening architecture

A storage system, and a method of data hardening in the storage system, including: a de-glitch module configured for a detection of a power failure event; a write page module, coupled to the de-glitch module, the write page module configured for an execution of a cache write command based on the power failure event to send a cache page from a cache memory to a storage channel controller, wherein the cache memory is a volatile memory; and a signal empty module, coupled to the write page module, the signal empty module configured for a generation of a sleep signal to shut down a host bus adapter, wherein the host bus adapter interfaces with the storage channel controller to write the cache page back to the cache memory upon a power up of the host bus adapter and the storage channel controller.

Data hardening in a storage system

The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.

Hard power fail architecture

An electronic system and method of operation thereof includes: a control unit for receiving a patterned signal; a recognizer module, coupled to the control unit, for recognizing an unique trigger from the patterned signal; an operation module, coupled to the recognizer module, for detecting an operational mode from the unique trigger; and a change module, coupled to the operation module, for configuring a system state change of a memory sub-system based on the operational mode.

Electronic system with system modification control mechanism and method of operation thereof

The disclosure is related to systems and methods of concurrent actions for data storage. A controller may be configured to initialize a first data storage medium and a second data storage medium. The controller may receive a command when the first data storage medium is initialized but before the second data storage medium is initialized. The controller may service the command when the command utilizes the first data storage medium and the initialization for the second data storage medium is not complete. A controller may also be configured to send an indicator to a host that the system is ready to receive commands when a first data storage device is initialized, but a second data storage device is still in an initialization process.

Concurrent actions for data storage

An off-track error recovery method and apparatus for a disk drive are disclosed herein. Off-track errors are either due to vibration of the disk drive or due to defective servo data stored on a disk surface of the disk drive. In order to tailor error recovery operations associated with each of the two types of off-track errors, the present invention distinguishes between the two types of errors, when possible. Accordingly, the overall time for performing off-track error recovery operations is reduced and/or off-track error recovery operations are made more efficient.

Off-track error recovery method and apparatus for disk drive

An adaptive error recovery routine allows for the recovery from errors in read data of a disk drive. In one embodiment, a disk drive is provided which has an error memory having error memory elements used to record an error type and recovery step for each error recovered from the disk drive. If another error is detected that is of the same type and which is in a location close to a recorded error, the error recovery step used for the previous error is performed for the new error. If the previous error recovery step is not successful, the disk drive performs error recovery using an existing error recovery table, and omits the previous error recovery step.

Method and apparatus for reducing error recovery time in hard disk drive

An apparatus for correcting read errors in a disk drive is disclosed. In one embodiment, the apparatus includes circuitry for determining that an undesired distortion exists in a data signal read from a surface of a data storage disk; circuitry for finding an approximate starting location of said distortion within said data signal; and, circuitry for correcting errors in said data signal caused by said undesired distortion using said approximate starting location of said distortion. A method for correcting read errors in a disk drive is also disclosed. In one embodiment, the method includes the steps of (1) providing an error correction code (ECC) that is capable of locating and correcting errors in a data signal; (2) determining that a data signal read from a surface of a data storage disk includes a distortion; (3) finding an approximate starting location of said distortion within said data signal; and, (4) performing error correction procedures on said data signal, based on said ECC, using said approximate starting location of said distortion

Method of correcting a read error in a disk drive

An apparatus for correcting read errors in a disk drive is disclosed. In one embodiment, the apparatus includes circuitry for determining that an undesired distortion exists in a data signal read from a surface of a data storage disk; circuitry for finding an approximate starting location of said distortion within said data signal; and, circuitry for correcting errors in said data signal caused by said undesired distortion using said approximate starting location of said distortion. A method for correcting read errors in a disk drive is also disclosed. In one embodiment, the method includes the steps of (1) providing an error correction code (ECC) that is capable of locating and correcting errors in a data signal; (2) determining that a data signal read from a surface of a data storage disk includes a distortion; (3) finding an approximate starting location of said distortion within said data signal; and, (4) performing error correction procedures on said data signal, based on said ECC, using said approximate starting location of said distortion.

Growing community of inventors

Longmont, CO, United States of America

Lace J Herman