Samsung Electronics Co., Ltd.

Kyuwan Kim

Daeyoung Moon

Jamin Koo

Kisoo Park

Wonseok Yoo

Chunhyung Chung

Jinwon Ma

A semiconductor memory device includes a device isolation pattern on a substrate to define an active region, a word line in the substrate, to intersect the active region, a first dopant region in the active region as at a first side of the word line, a second dopant region in the active region at a second side of the word line, a bit line connected to the first dopant region and intersecting the word line, a bit line contact connecting the bit line to the first dopant region, a landing pad on the second dopant region, and a storage node contact connecting the landing pad to the second dopant region, the storage node contact including a first portion in contact with the second dopant region, the first portion including a single-crystal silicon, and a second portion on the first portion and including a poly-silicon.

Semiconductor memory device and a method of manufacturing the same

An integrated circuit device includes; word lines extending in a first direction across a substrate and spaced apart in a second direction different from the first direction, bit lines extending on the word lines in the second direction and spaced apart in the first direction, a first contact plug arranged among the bitlines, contacting a first active region of the substrate, having a first width, and having a first dopant concentration, and a second contact plug arranged among the bitlines, contacting a second active region of the substrate, having a second width, and having a second dopant concentration less than the first dopant concentration.

Integrated circuit device

Semiconductor memory device using different crystallinities in storage node contact and a method of manufacturing the same

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Suwon-si, South Korea

Kyuwan Kim