Skyworks Solutions, Inc.

Caldera Micro Technology, Inc.

Kyushik Hong

Richard S Burton

Apostolos Samelis

Youngwoo Kwon

John H Hong

Won Yup Ko

Charles F Krumm

Jinho Jeong

Philip C Canfield

Debora L Green

Noureddine Matine

Nyuntae Kim

John Hyunchul Hong

A method of manufacturing a semiconductor device having an improved ohmic contact system to epitaxially grown, low bandgap compound semiconductors. In an exemplary embodiment, the improved ohmic contact system comprises a thin reactive layer of nickel deposited on a portion of an epitaxially grown N+ doped InGaAs emitter cap layer. The improved ohmic contact system further comprises a thick refractory layer of titanium or other suitable material deposited on the thin reactive layer. Both the reactive layer and the refractory layer are substantially free of gold and other low resistivity, high conductivity metal overlayers. The improved ohmic contact system and method for forming the same minimize contact resistance, improve reliability and the long-term stability of the electrical characteristics of the device, minimize raw material costs, and decrease manufacturing costs on high performance semiconductor devices, such as heterojunction bipolar transistors, laser diodes, light emitting diodes (LEDs), Schottky diodes, field effect transistors (FETs), metal-semiconductor field effect transistors (MESFETs), metal-oxide-semiconductor field effect transistors (MOSFETs), high electron mobility transistors (HEMTs), and other compound semiconductor and optoelectronic devices.

Electrical contact for compound semiconductor device and method for forming same

According to one exemplary embodiment, a heterojunction bipolar transistor comprises an emitter. The heterojunction bipolar transistor further comprises a first emitter cap comprising a first high-doped layer, a low-doped layer, and a second high-doped layer, where the first high-doped layer is situated on the emitter, the low-doped layer is situated on the first high-doped layer, and the second high-doped layer is situated on the low-doped layer. The first high-doped layer, the low-doped layer, and the second high-doped layer form an emitter ballast resistor. According to this exemplary embodiment, the low-doped layer has a thickness and a dopant concentration level such that the resistance of the low-doped layer is substantially independent of the dopant concentration level, but corresponds to the thickness of the low-doped layer.

Structure and method in an HBT for an emitter ballast resistor with improved characteristics

A variable bandwidth, distributed amplifier circuit includes an input transmission line; an output transmission line; and a plurality of amplifier cells having a respective plurality of cell inputs distributed along the input transmission line and cell outputs distributed along said output transmission line. Each amplifier cell comprises a cascode amplifier having an input transistor, an output transistor, and a variable impedance device in a circuit branch coupled to a gate of the output transistor. The impedance of the variable impedance device is responsive to a variable bias control signal.

Wideband, variable-bandwidth distributed amplifier

According to one disclosed embodiment, a heavily doped subcollector is formed. Subsequently, a collector is fabricated over the heavily-doped subcollectoi, wherein the collector comprises a medium-doped collector layer adjacent to the subcollector and a low-doped collector layer over the medium-doped collector layer. Both the medium-doped collector layer and the low-doped collector layer can comprise gallium-arsenide doped with silicon at between approximately 5&times;10 cm and approximately 1&times;10 cm , and at between approximately 1&times;10 cm and approximately 3&times;10 cm , respectively. Thereafter, a base is grown over the collector, and an emitter is deposited over the base. The collector of the HBT prevents the depletion region from reaching the subcollector without unduly impeding the expansion of the depletion region. As a result, filamentation in the subcollector is prevented, but the HBT's performance remains optimal.

Method for fabrication of a heterojunction bipolar transistor

According to one disclosed embodiment, a heavily doped subcollector is formed. Subsequently, a collector is fabricated over the heavily-doped subcollector, wherein the collector comprises a medium-doped collector layer adjacent to the subcollector and a low-doped collector layer over the medium-doped collector layer. Both the medium-doped collector layer and the low-doped collector layer can comprise gallium-arsenide doped with silicon at between approximately 5&times;10 cm and approximately 1&times;10 cm , and at between approximately 1&times;10 cm and approximately 3&times;10 cm , respectively. Thereafter, a base is grown over the collector, and an emitter is deposited over the base. The collector of the HBT prevents the depletion region from reaching the subcollector without unduly impeding the expansion of the depletion region. As a result, filamentation in the subcollector is prevented, but the HBT's performance remains optimal.

Structure for a heterojunction bipolar transistor

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Thousand Oaks, CA, United States of America

Kyushik Hong