Samsung Electronics Co., Ltd.

Kyungtae Do

Jun Seomun

Wook Hwan Kim

Hyosig Won

Hyungock Kim

Jungyun Choi

Insub Shin

Kee Sup Kim

JaeHan Jeon

JungYun Choi

Chungki Oh

Voltage monitors include a predelay cell having an input responsive to a first clock signal. This cell is configured to generate a predelayed clock signal at an output thereof. A serially-connected string of data delay cells is provided, which has an input responsive to the predelayed clock signal. A serially-connected string of clock delay cells is provided, which has an input responsive to a second clock signal that is synchronized to the first clock signal. A plurality latches are provided. The latches have respective data inputs, which are responsive to first periodic signals generated at respective outputs of the serially-connected string of data delay cells, and respective clock/sync terminals, which are responsive to second periodic signals generated at respective outputs of the serially-connected string of clock delay cells. The latches enable loading of a delay code value, which indicates power supply voltage variation.

Voltage monitor for generating delay codes

A temperature control method of a semiconductor device is provided. The temperature control method includes detecting a temperature of the semiconductor device; activating a reverse body biasing operation in which a body bias voltage applied to a function block of the semiconductor device is regulated, when the detected temperature is greater than a first temperature level; and activating a thermal throttling operation in which at least one of a frequency of a driving clock provided to a function block of the semiconductor device and a driving voltage applied to the function block of the semiconductor device is regulated, when the detected temperature is greater than a second temperature level that is different than the first temperature level.

System on chip and temperature control method thereof

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Changwon-si, South Korea

Kyungtae Do