Samsung Electronics Co., Ltd.

Industry-university Cooperation Foundation Hanyang University

Kyung-Yub Jeon

Myeong-Cheol Kim

Hak-Sun Lee

Jeong-yun Lee

Ji-young Lee

Ji-Hoon Cha

Je-Woo Han

Shi-Yong Yi

Dong-Ki Yoon

Dong-Chan Kim

Cha-Won Koh

Kyoung-Sub Shin

Jae-hong Park

Tae-Gon Kim

Doo-youl Lee

Gyung-Jin Min

Kyung-Sun Kim

Jun-ho Yoon

Chin-Wook Chung

Song-yi Yang

Jong-heui Song

Je-woo Han

To diagnose plasma in a plasma space, a plurality of floating probes are installed at a plurality of points, respectively, in a plasma space. An electron density ratio at each of the points is calculated by measuring a first probe current of each of the floating probes, the probe current including a DC component. A point ion density and a point electron temperature at each of the points are calculated by measuring a second probe current of each of the floating probes before the electron density ratio is calculated, the second probe current excluding the DC component.

Method and apparatus of diagnosing plasma in plasma space

A patterning method using a metal mask includes sequentially forming a lower metal layer and an upper metal layer on an etching object layer, forming an upper metal mask, forming the upper metal mask including patterning the upper metal layer, forming a lower metal mask, forming the lower metal mask including patterning the lower metal layer using the upper metal mask, and patterning the etching object layer using the upper metal mask.

Patterning method using metal mask and method of fabricating semiconductor device including the same patterning method

An apparatus for an etching process includes a chamber, a plasma generator disposed in the chamber, a stacked structure disposed in the chamber to support a substrate thereon and including an electrode plate and an insulation coating layer on the electrode plate, electrode rods inserted into through holes of the stacked structure to penetrate through the stacked structure, directly contacting the substrate and spaced apart from sidewalls of the through holes of the stacked structure, at least one DC pulse generator generating a DC pulse to the electrode plate and the electrode rods, first connection lines connecting the DC pulse generator to the electrode rods, and at least one second connection line connecting the DC pulse generator to a lower portion of the electrode plate.

Etching apparatus and etching method

Provided is a method of forming a semiconductor device. The method may include forming a first insulating layer on a semiconductor substrate. A first polycrystalline silicon layer may be formed on the first insulating layer. A second insulating layer may be formed on the first polycrystalline silicon layer. A second polycrystalline silicon layer may be formed on the second insulating layer. A mask pattern may be formed on the second polycrystalline silicon layer. The second polycrystalline silicon layer may be patterned using the mask pattern as an etch mask to form a second polycrystalline silicon pattern exposing a portion of the second insulating layer. A sidewall of the second polycrystalline silicon pattern may include a first amorphous region. The first amorphous region may be crystallized by a first recrystallization process. The exposed portion of the second insulating layer may be removed to form a second insulating pattern exposing a portion of the first polycrystalline silicon layer. The exposed portion of the first polycrystalline silicon layer may be removed to form a first polycrystalline silicon pattern exposing a portion of the first insulating layer. The exposed portion of the first insulating layer may be removed to form a first insulating pattern exposing a portion of the semiconductor substrate.

Method of forming semiconductor device

For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.

Method of fine patterning semiconductor device

A method of forming a semiconductor device may include forming a first pattern on a substrate, and forming a first dielectric layer on the first pattern. The first pattern may be between portions of the first dielectric layer and the substrate. A second dielectric layer may be formed on the first dielectric layer, and the first dielectric layer may be between the first pattern and the second dielectric layer. A second pattern may be formed on the second dielectric layer. Portions of the second dielectric layer may be exposed by the second pattern, and the first and second dielectric layers may be between portions of the first and second patterns. The exposed portions of the second dielectric layer may be isotropically etched.

Methods of forming semiconductor devices

A method for forming hard mask patterns includes, sequentially forming first, second, and third hard mask layers formed of materials having different etching selectivities on a substrate, forming first sacrificial patterns having a first pitch therebetween on the third hard mask layer, forming fourth hard mask patterns with a second pitch between the first sacrificial patterns, the second pitch being substantially equal to about &#xbd; of the first pitch, patterning the third hard mask layer to form third hard mask patterns using the fourth hard mask patterns as an etch mask, patterning the second hard mask layer to form second hard mask patterns using the third and fourth hard mask patterns as an etch mask, and patterning the first hard mask layer to form first hard mask patterns with the second pitch therebetween using the second and third hard mask patterns as an etch mask.

Method for forming hard mask patterns having a fine pitch and method for forming a semiconductor device using the same

A method of forming fine patterns of semiconductor device according to an example embodiment may include forming a plurality of multi-layered mask patterns by stacking first mask patterns and buffer mask patterns on an etch film to be etched on a substrate, forming, on the etch film, second mask patterns in spaces between the plurality of multi-layered mask patterns, removing the second mask patterns to expose upper surfaces of the first mask patterns, and forming the fine patterns by etching the etch film using the first and second mask patterns as an etch mask. This example embodiment may result in the formation of diverse dimensions at diverse pitches on a single substrate.

Method of forming fine patterns of semiconductor devices using double patterning

A method of forming a first hard mask pattern including a plurality of first line patterns formed on the etch target layer in a first direction and having a first pitch. A third layer is formed on sidewalls and an upper surface of the first hard mask pattern, such that the third layer includes a top surface having a recess formed between two adjacent first line patterns. A second hard mask pattern including a plurality of second line patterns each extending in the first direction within the recess is formed. Then, the third layer is anisotropically etched to selectively expose an etch target layer between the first line patterns and the second line patterns. Then, the etch target layer is anisotropically etched using the first hard mask pattern and the second hard mask pattern as an etch mask.

Method of forming pattern using fine pitch hard mask

A method for forming fine patterns of a semiconductor device is disclosed. The method includes forming an etch film on a substrate, forming a protection film on the etch film, forming a hard mask layer on the protection film, and forming a plurality of first mask patterns characterized by a first pitch on the hard mask layer. The method further comprises forming a plurality of second mask patterns, forming hard mask patterns exposing portions of the protection film by etching the hard mask layer using the first and second mask patterns as an etch mask, and removing the first and second mask patterns. The method still further comprises exposing portions of the etch film and forming a plurality of fine patterns characterized by a second pitch equal to half of the first pitch by etching the etch film using at least the hard mask patterns as an etch mask.

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Yongin-si, South Korea

Kyung-Yub Jeon