Samsung Electronics Co., Ltd.

Kyung-rae Byun

Suk-Ho Joo

In-gyu Baek

Gang Zhang

Hyung-yong Kim

Shi Li Quan

Jin-yong Choi

Seug-gab Park

Kyung-Chang Ryoo

Hong-Sik Yoon

Byeong-Ok Cho

Young-Moon Choi

Sun-Woo Lee

Hee-Seok Kim

Jang-Eun Heo

Hyoung-seub Rhie

Min-Joon Park

Hwa-Young Ko

Jin-Hwan Ham

The inventive concepts provide a three-dimensional (3D) image sensor, based on structured light (SL), having a structure in which difficulty in a manufacturing process of a wiring layer is decreased and/or an area of a bottom pad of a capacitor is increased. The 3D image sensor includes: a pixel area including a photodiode in a semiconductor substrate and a gate group including a plurality of gates; a multiple wiring layer on an upper portion of the pixel area, the multiple wiring layer including at least two wiring layers; and a capacitor structure between a first wiring layer on a lowermost wiring layer of the multiple wiring layer and a second wiring layer on the first wiring layer, the capacitor structure including a bottom pad, a top pad, and a plurality of capacitors, wherein the bottom pad is connected to the first wiring layer.

Three-dimensional image sensor based on structured light

Provided is a method of forming a contact structure. The method includes forming a conductive pattern on a substrate. An interlayer insulating layer covering the conductive pattern is formed. The interlayer insulating layer is patterned to form an opening partially exposing the conductive pattern. An oxide layer is formed on substantially the entire surface of the substrate on which the opening is formed. A reduction process is performed to reduce the oxide layer. Here, the oxide layer on a bottom region of the opening is reduced to a catalyst layer, and the oxide layer on a region other than the bottom region of the opening is reduced to a non-catalyst layer. A nano material is grown from the catalyst layer, so that a contact plug is formed in the opening.

Method of forming contact structure

A device includes an insulating layer on a substrate having a lower conductive pattern, the insulating layer having a contact hole that penetrates the insulating layer and exposes a portion of the lower conductive pattern, a catalytic pattern having a first portion on the exposed portion of the lower conductive pattern and a second portion on a sidewall of the contact hole, a spacer on the sidewall of the contact hole, wherein the second portion of the catalytic pattern is disposed between the spacer and the sidewall, and a contact plug in the contact hole and contacting the catalytic pattern, the contact plug being a carbon nanotube material.

Device including contact structure and method of forming the same

Disclosed are a semiconductor device and a related method of manufacture. The semiconductor device comprises a semiconductor substrate, a conductive structure including contact regions and gate structures formed on the semiconductor substrate, a protection layer formed on the gate structures, an insulation layer formed on the protection layer, and a plurality of contacts directly contacting the contact regions and the semiconductor substrate through the insulation layer, wherein the contacts have substantially different heights from each other.

Semiconductor device and related method of manufacture

In a phase changeable memory device and a method of formation thereof, the phase changeable memory device comprises: a lower electrode pattern on an interlayer insulating layer; an insulating pattern located on the lower electrode pattern; a phase changeable pattern penetrating the insulating pattern and the lower electrode pattern to contact the lower electrode pattern and the interlayer insulating layer; and an upper electrode on the phase changeable pattern.

Phase changeable memory device and method of formation thereof

Growing community of inventors

Suwon-si, South Korea

Kyung-rae Byun