Samsung Electronics Co., Ltd.

Kyung-Mun Byun

Hong-Rae Kim

Gil-heyun Choi

Byoung-Deog Choi

Hee-Young Park

Eunkee Hong

Eun-kyung Baek

Jong-Wan Choi

Jin-Hyung Park

Shin-hye Kim

Sang-Ho Roh

Young-sun Kim

Deok-Young Jung

Ju-seon Goo

Sang-Ho Rha

Badro Im

Kyung-Seok Oh

Eun-kee Hong

Sin-Hae Do

Gyeong-Deok Park

In a method of manufacturing a semiconductor memory device, a plurality of first conductive structures including a first conductive pattern and a hard mask are sequentially stacked on a substrate. A plurality of preliminary spacer structures including first spacers, sacrificial spacers and second spacers are sequentially stacked on sidewalls of the conductive structures. A plurality of pad structures are formed on the substrate between the preliminary spacer structures, and define openings exposing an upper portion of the sacrificial spacers. A first mask pattern is formed to cover surfaces of the pad structures, and expose the upper portion of the sacrificial spacers. The sacrificial spacers are removed to form first spacer structures having respective air spacers, and the first spacer structures include the first spacers, the air spacers and the second spacers sequentially stacked on the sidewalls of the conductive structures.

Methods of manufacturing semiconductor devices

Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a direction on a substrate, an insulating isolation pattern between the first and second line structures and a conductive structure between the first and second line structures and next to the insulating isolation pattern along the direction. The semiconductor devices may also include an empty space including a first portion between the first line structure and the conductive structure and a second portion between the first line structure and the insulating isolation pattern. The first portion of the empty space may have a height different from a height of the second portion of the empty space.

Semiconductor devices including empty spaces

Semiconductor devices including empty spaces and methods of forming the same

Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.

Oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices

A semiconductor device may include a semiconductor substrate and a plurality of three-dimensional capacitors on the semiconductor substrate. Each of the plurality of three-dimensional capacitors may include a first three-dimensional electrode, a capacitor dielectric layer, and a second three-dimensional electrode with the first three-dimensional electrode between the capacitor dielectric layer and the semiconductor substrate and with the capacitor dielectric layer between the first and second three-dimensional electrodes. A plurality of capacitor support pads may be provided with each capacitor support pad being arranged between adjacent first three-dimensional electrodes of adjacent three-dimensional capacitors with portions of the capacitor dielectric layers between the capacitor support pads and the semiconductor substrate. Related methods and apparatuses are also discussed.

Semiconductor devices including 3-D structures with support pad structures and related methods and systems

A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material.

Method of filling a trench and method of forming an isolating layer structure using the same

A semiconductor device having a trench isolation region and methods of fabricating the same are provided. The method includes forming a first trench region in a substrate, and a second trench region having a larger width than the first trench region in the substrate. A lower material layer may fill the first and second trench regions. The lower material layer may be etched by a first etching process to form a first preliminary lower material layer pattern remaining in the first trench region and form a second preliminary lower material layer pattern that remains in the second trench region. An upper surface of the second preliminary lower material layer pattern may be at a different height than the first preliminary lower material layer pattern. The first and second preliminary lower material layer patterns may be etched by a second etching process to form first and second lower material layer patterns having top surfaces at substantially the same height. First and second upper material layer patterns may be formed on the first and second lower material layer patterns, respectively.

Semiconductor device having trench isolation region and methods of fabricating the same

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Seoul, South Korea

Kyung-Mun Byun