Samsung Electronics Co., Ltd.

Kyuha Lee

Hoonjoo Na

Seokho Kim

Jaehyung Park

Joohee Jang

Kwangjin Moon

Yikoan Hong

Jusik Kim

Seongmin Son

Sangjun Park

Johannes Büsing

Youngmi Kim

Hyunuk Park

Jeawon Lee

Pilkyu Kang

Hyoungyol Mun

Junwon Seo

Uidam Jung

Seungil Han

Chanyeong Park

A dishwasher is disclosed. The dishwasher comprises: a cabinet; a washing tub provided inside the cabinet; and a cutlery basket inside the washing tub and including a first sidewall, a second side wall opposite to the first sidewall, a main body including first holes formed in the first and second sidewalls and second holes spaced apart from the first holes at right angles, and a handle including a first fastener facing the outer surface of the first side wall, a second fastener facing the outer surface of the second sidewall, and a grip connecting the first and second fasteners, first and second protrusions formed on each of the first and second fasteners and the first protrusions inserted into the first holes and have an upper surface contacting the main body, and the second protrusions are inserted into the second holes and have a lower surface contacting the main body.

Cutlery basket and dishwasher comprising same

A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

Semiconductor device and method of manufacturing the same

A dishwasher includes a main body, a tub provided inside the main body and configured to form a washing chamber, a machine room formed under the tub, a drain hose configured to discharge washing water stored in the washing chamber, and a hose fixer disposed on a side surface of the tub and configured to fix at least a part of the drain hose, and the drain hose further includes a first coupler coupled to one side of the machine room and a second coupler coupled to the hose fixer, and the first coupler includes an insertion part provided to extend in a longitudinal direction of the first coupler to be inserted to the one side of the machine room to couple the first coupler to the one side of the machine room.

Dishwasher

A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.

Semiconductor packages

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-&#x3ba; dielectric material.

Method of manufacturing a semiconductor device including bonding layer and adsorption layer

A semiconductor package includes main pad structures and dummy pad structures between a first semiconductor chip and a second semiconductor chip. The main pad structures include first main pad structures apart from one another on the first semiconductor chip and second main pad structures placed apart from one another on the second semiconductor chip and bonded to the first main pad structures. The dummy pad structures include first dummy pad structures including first dummy pads apart from one another on the first semiconductor chip and first dummy capping layers on the first dummy pads, and second dummy pad structures including second dummy pads apart from one another on the second semiconductor chip and second dummy capping layers on the second dummy pads. The first dummy capping layers of the first dummy pad structures are not bonded to the second dummy capping layers of the second dummy pad structures.

Semiconductor package for improving bonding reliability

A semiconductor device includes a first structure including a first bonding structure, and a second structure on the first structure and including a second bonding structure connected to the first bonding structure. The first bonding structure includes a first insulating layer, a first bonding insulating layer on the first insulating layer, first bonding pads penetrating at least a portion of the first insulating layer and the first bonding insulating layer, and first metal patterns in the first insulating layer and in contact with the first bonding insulating layer, and having an upper surface at a lower level than upper surfaces of the first bonding pads. The second bonding structure includes a second bonding insulating layer bonded to the first bonding insulating layer, a second insulating layer on the second bonding insulating layer, and second bonding pads penetrating the second bonding insulating layer and connected to the first bonding pads.

Semiconductor devices having bonding structures with bonding pads and metal patterns

A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer.

Methods of manufacturing semiconductor devices

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

Semiconductor devices including bonding layer and adsorption layer

A semiconductor device is provided and includes first and second semiconductor chips bonded together. The first chip includes a first substrate, a first insulating layer disposed on the first substrate and having a top surface, a first metal pad embedded in the first insulating layer and having a top surface substantially planar with the top surface of the first insulating layer, and a first barrier disposed between the first insulating layer and the first metal pad. The second chip includes a second substrate, a second insulating layer, a second metal pad, and a second barrier with a similar configuration to the first chip. The top surfaces of the first and second insulating layers are bonded to provide a bonding interface, the first and second metal pads are connected, and a portion of the first insulating layer is in contact with a side region of the first metal pad.

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Seongnam-si, South Korea

Kyuha Lee