Samsung Electronics Co., Ltd.

Magnachip Semiconductor, Inc.

Kyu-Young Chung

Jong-Kon Bae

Won-sik Kang

Jae-hyuck Woo

Chul Jun Choi

Seong-Cheol Kim

Sung-jin Jang

A sawtooth wave generating circuit that outputs a sawtooth wave signal after calibration and a switch mode power supply device including the sawtooth wave generating circuit is disclosed. The sawtooth wave generating circuit includes a capacitor, a calibration circuit, a charging circuit, discharging circuit and a control unit. The calibration circuit feedbacks a sawtooth wave signal, generates a plurality of voltage signals based on the sawtooth wave signal, and selects one of the voltage signals to generate a calibration output signal. Therefore, the sawtooth wave generating circuit generates a stable sawtooth wave signal regardless of operating conditions.

Sawtooth wave generating circuit and switch mode power supply device having the same

An automatic data recovery circuit includes a register, an error detection unit and a data recovery unit. The register stores a register data including an input data and a remainder data generated by a cyclic redundancy check calculation on the input data using a predefined generation polynomial. The error detection unit performs a modular calculation on the register data stored in the register using the predefined generation polynomial to generate an error detection signal indicating whether an error is detected in the register data stored in the register. The data recovery unit recovers the input data when an error is detected in the input data based on the error detection signal and a comparison data generated by comparing the input data stored in the register with a reference voltage using a capacitor.

Automatic data recovery circuit and data error detection circuit

A source driver and a common voltage driver for a display device using a time division driving method, in which the source driver outputs an analog voltage corresponding to digital image data to a corresponding source line out of a plurality of source lines, after precharging the corresponding source line with a predetermined voltage. The common voltage driver discretely and sequentially increases or decreases the common voltage. By using the source driver and the common voltage driver, the power consumed upon driving of the display device can be reduced.

Source driver, common voltage driver, and method of driving display device using time division driving method

Disclosed is an operational amplifier including an overdriving circuit capable of reaching a target voltage within an operation time by outputting a higher voltage than the target voltage when an RC delay time is greater. The operational amplifier may including an overdriving circuit, in which first and second input terminals and an output terminal may be provided, an input voltage may be applied to the first input terminal, a second input terminal may be connected to the output terminal, and the input voltage applied to the first input terminal may be overdriven to have a certain level to be outputted to the output terminal, may include: first and second overdriving units performing an overdriving operation at a rising edge and a falling edge, respectively.

Operational amplifier with overdriving circuit and method for same

A boosted voltage generation circuit may include: a boosting circuit configured to boost an input voltage based on a boosting rate and output a boosted voltage, a boosting rate setting unit configured to receive a feedback on a level of the input voltage and set a boosting rate, and an input voltage level setting unit configured to set the level of the input voltage in response to a target level of the boosted voltage and the boosting rate.

Circuit for generating boosted voltage and method for operating the same

In one aspect, an apparatus for driving display data includes an address mapping unit which generates second address units by dividing gradation data displayed on a plurality of pixels in a display panel into a plurality of first address units that are in the form of an a&#xd7;b matrix, and mapping addresses of the gradation data in each of the first address units into the form of a b&#xd7;a matrix, wherein the plurality of the first and second address units are arranged in the form of an M&#xd7;N matrix, wherein a, b, M and N are natural numbers, and a is greater than b. The apparatus further includes a memory unit which stores the second address units having the mapped addresses in the form of a b&#xd7;a matrix as units in the form of an M&#xd7;N matrix, a data output unit which receives the data in a&#xd7;N columns output from the memory unit and outputs the data as data in b&#xd7;N columns, and a source driver block which receives the data in the b&#xd7;N columns and transmitting the data to the display panel.

Method and apparatus for driving display data

Provided is an output buffer, which may be included in a source driver of a liquid crystal display (LCD) device. The output buffer may include a differential amplification unit and an output unit. The differential amplification unit may generate control currents by amplifying the difference between the voltages of an analog image signal and a signal output from the output buffer. The output unit outputs the amplified analog image signal in response to the control currents. The amount of bias current used to drive the differential amplification unit increases during a charge recycling period, and the amount of quiescent current flowing through the output unit decreases during the charge recycling period. The amount of the bias current used to drive the differential amplification unit decreases during a driving period, and the amount of the quiescent current flowing through the output unit increases during the driving period.

Source driver in liquid crystal display device, output buffer included in the source driver, and method of operating the output buffer

A source driving circuit includes a source driver circuit, an intermediate voltage generator, and a switching control unit. The source driver circuit receives display data and generates a source driving voltage corresponding to the received display data The intermediate voltage generator generates an intermediate source driving voltage. The switching control unit receives a plurality of control signals for selectively applying the source driving voltage and the intermediate source driving voltage to data lines of a display as a driving voltage and controls an order of transition to final levels of a common electrode voltage and the driving voltage. The common electrode voltage may be applied to a common electrode of a liquid crystal capacitor coupled to the data line of the display.

Source driving circuit and liquid crystal display apparatus including the same

An amplifier which operates with low power is provided. In the amplifier, a first input unit includes a first control circuit and a second control circuit each including one terminal connected to an output node and the other terminal connected to a respective input transistor from among the plurality of input transistors, and controls the amount of current flowing into the plurality of input transistors or flowing out of the plurality of input transistors according to operating modes of the amplifier, whereby even when an A bias current is increased in order to increase a slew rate of the amplifier, a B bias current a the quiescent current do not increase.

Low power operational amplifier

An averaging circuit includes an averaging unit and an offset compensation unit. The averaging unit generates an average signal from first and second input signals. The offset compensating unit is coupled to the averaging unit for conducting away bias currents from the averaging unit for preventing an offset in the average signal when any of the first and second input signals is too low or too high.

Offset compensation for rail-to-rail avereraging circuit

An oscillator includes a first comparator circuit, a second comparator circuit, an oscillation signal generator circuit, and a frequency voltage generator circuit. The first comparator circuit generates a first pulse when a frequency voltage reaches a first reference voltage, and the second comparator circuit generates a second pulse when the frequency voltage reaches a second reference voltage. The oscillation signal generator circuit generates an oscillation signal by latching a first voltage in response to the first pulse and latching a second voltage in response to the second pulse. The frequency voltage generator circuit raises or lowers the frequency voltage in response to the oscillation signal. The driving capability of the first comparator circuit is reduced at the latching of the first voltage and is restored at the latching of the second voltage. The driving capability of the second comparator circuit is reduced at the latching of the second voltage and is restored at the latching of the first voltage.

Oscillator having comparator circuits having adjustable driving capabilities and method for operating the same

A circuit and a method for generating a common voltage, and a liquid crystal display (LCD) device including the circuit for generating a common voltage. Chip size and accumulated offset voltage of a liquid crystal display (LCD) may be reduced. The circuit for generating a common voltage includes a digital logic calculator, an input reference voltage generator, and a buffer unit. Prior to the generation of the common voltage, the digital logic calculator sets an input reference voltage corresponding to a target voltage.

Circuits and methods for generating a common voltage

Provided is a liquid crystal display panel having gate drivers. The LCD panel includes a gate line shift circuit setting a gate line scanning order such that the gate lines are sequentially scanned in units of n gate lines with k&#x2212;1 gate lines between each pair of adjacent gate lines in each unit according to an interleaving method in response to a gate line-on signal received from a timing control unit outside the LCD panel, wherein the LCD panel reproduces source data output from a source driver outside the LCD panel in the gate line scanning order set by the gate line shift circuit. The LCD panel inverts the polarity of a common voltage for every unit of n gate lines, instead of every gate line, thereby reducing power consumption. In addition, since every kgate line is scanned according to the interleaving method, deterioration of image quality such as a flickering phenomenon can be prevented, which is an advantage of a line inversion driving method.

LCD panel including gate drivers

A source driver and method of driving a flat panel display is provided. As a circuit unit including a multiplexer and a channel selection unit, a source driver performs a single operation to drive one source line in a segment of a horizontal scan period and repeats the single operation multiple times to drive a plurality of source lines in the horizontal scan period.

Time division driving method and source driver for flat panel display

A voltage boost circuit and a method of boosting voltage using a voltage boost clock signal with varying frequency, in which the voltage boost circuit includes a boost voltage generator that responds to a voltage boost clock signal in order to boost an input voltage and outputs the boosted input voltage as an output boost voltage; and a boost voltage frequency control unit that responds to the result obtained by comparing a level of the output boost voltage and a level of a target boost voltage so as to change the boost voltage frequency of the voltage boost clock signal and outputs the voltage boost clock signal having the changed boost voltage frequency. The voltage boost circuit and the voltage boosting method can prevent a waste of the operating current during the boosting of the voltage.

Growing community of inventors

Seoul, South Korea

Kyu-Young Chung