Skhynix Inc.

Amkor Technology, Inc.

Lg Innotek Co., Ltd.

Other

Hynix Semiconductor Inc.

Markany Inc.

Hyosung P&m Co., Ltd.

Kyu Won Lee

Ji Eun Kim

Cheol Ho Joh

Hee Min Shin

Sang Myung Lee

Eun Hye Do

Chong Ho Cho

Chan Yok Park

Woo Young Lee

Doo Hyun Park

Hyun Seok Seo

Gi Jeong Kim

Qwan Ho Chung

Jae Yoon Kim

Ji Su Kim

Hyoung Jun Kim

Jae Seok Park

Won Suk Jung

Yeong Uk Seo

Ki Do Chun

Sang Hyun Ryu

Yun Ho An

Byeong Ho Kim

Chang Woo Yoo

Dong Hee Kang

Yong Suk Yoo

Yoon Ha Jung

Jae Wook Seok

Ki Ill Moon

Eun-Hye Do

Myoung J Choi

Sam K Lim

Cheol Woo Han

Mi Gyung Kim

An embodiment of the present disclosure may provide an Internet-of-Things (IoT) sensor attached to the surface of industrial equipment to acquire data, the IoT sensor including: a first substrate; a first connector electrically connected to the first substrate and attached to the surface of the first substrate to transfer a measurement signal of the sensor; a cable formed of a flexible conductive wire and having one end connected to the first connector; a second connector connected to the other end of the cable and configured to receive the measurement signal of the sensor; and a communication module attached to a second substrate connected to the second connector.

System for monitoring industrial equipment through IoT sensors and augmented reality implementation

A printed circuit board includes a core insulating layer including an isotropic resin, a first circuit pattern filled in a circuit pattern groove at an upper portion or a lower portion of the core insulating layer, a first insulating layer provided in a top surface thereof with a circuit pattern groove and covering the first circuit pattern, and a second circuit pattern to fill the circuit pattern groove of the first insulating layer. A material, such as polyimide, having an isotropic structure is employed for the core insulating layer, thereby preventing the substrate from being bent without glass fiber. Since the glass fiber is not included, the buried pattern is formed at the upper portion or the lower portion of the core insulating layer, so that the thin substrate is fabricated.

Printed circuit board having buried circuit pattern and method for manufacturing the same

Provided is a printed circuit board including: an insulating layer; electronic devices embedded in the insulating layer; and an adhesive layer for fixing the electronic devices.

Printed circuit board

Provided is a printed circuit board, including: a core substrate including an internal circuit pattern on an upper surface or a lower surface; electronic devices which are formed to pass through the core substrate; an external insulating layer which covers the internal circuit pattern and the electronic devices; and an external circuit pattern which is formed on an upper surface of the external insulating layer, wherein a lower surface of the electronic devices protrudes from the lower surface of the core substrate to a lower part. Accordingly, in the embedded printed circuit board in which the electronic devices are embedded, when the electronic devices are mounted, because the insulating layer is formed regardless of a thickness of the electronic devices, the printed circuit board having a desired thickness regardless of the thickness of the electronic devices can be formed.

Printed circuit board and method of manufacturing the same

Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the first face and to have a recess formed in the first face. The semiconductor package may include a first semiconductor chip disposed on the bottom of the recess. The semiconductor package may include a second semiconductor chip disposed on the second face of the substrate. The semiconductor package may include a third semiconductor chip disposed over the first face of the substrate and the first semiconductor chip. The semiconductor package may include a fourth semiconductor chip disposed over the third semiconductor chip.

Semiconductor package including a step type substrate

Disclosed are a method, apparatus, and system for controlling a terminal device. A method of controlling a terminal device is performed by a terminal device control unit included in the terminal device. The method may include determining whether or not to change a state of the terminal device into a terminal device control state based on range information including at least one of a control area and a control period in which the terminal device is controlled and the real-time information of the terminal device, changing the state of the terminal device into the terminal device control state based on a result of the determination, and controlling the terminal device based on the control information in the terminal device control state.

Method, apparatus, and system for controlling terminal device

A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

Stack package and method for manufacturing the same

The semiconductor package includes an upper semiconductor chip stacked on a package substrate and a support layer or a lower semiconductor chip disposed between the upper semiconductor chip and the package substrate. The upper semiconductor chip includes a protrusion downwardly extending from an edge thereof. The protrusion of the upper semiconductor chip is combined with a sidewall of the support layer or the lower semiconductor chip. Related methods are also provided.

Semiconductor packages including semiconductor chips having protrusions and methods of fabricating the same

Methods of forming an interconnection line pattern using a screen printing technique. The method includes preparing a substrate having unevenness, aligning a stencil mask on the substrate, and printing a paste including materials for forming the interconnection line pattern on a convex portion of the unevenness formed on the substrate.

Methods for forming interconnection line using screen printing technique

In one embodiment, a semiconductor package includes a generally planar die paddle or die pad that defines multiple peripheral edge segments, and includes one or more tie bars protruding therefrom. In addition, the semiconductor package includes a plurality of leads, portions of which protrude from respective side surfaces of a package body of the semiconductor package. Connected to the top surface of the die pad is at least one semiconductor die which is electrically connected to at least some of the leads. At least portions of the die pad, the leads, and the semiconductor die are encapsulated by the package body. The one or more tie bars and the plurality of leads include downsets that are sized and oriented relative to each other to facilitate enhanced manufacturing.

Semiconductor device including leadframe with downsets

A chip unit includes: a first semiconductor chip and a second semiconductor chip disposed such that their surfaces for forming first bonding pads and second bonding pads face each other; first and second connection members disposed on the surfaces of the first and second semiconductor chips for forming the first and second bonding pads, and having redistribution lines which have one ends connected with the first and second bonding pads and the other ends projecting beyond one edges of the first and second semiconductor chips and films; an adhesive member interposed between the first connection members and the second connection members; and via patterns passing through the adhesive member and connecting projecting portions of the redistribution lines of the first and second connection members with each other.

Chip unit and stack package having the same

A stacked semiconductor package includes a semiconductor package module including a plurality of semiconductor packages each of which has a first surface, a second surface facing away from the first surface, side surfaces connecting the first surface and the second surface and through-holes formed on the side surfaces to pass through the first surface and the second surface and which are stacked such that their through-holes vertically connect with one another, and adhesive members which are formed between the semiconductor packages and attach the semiconductor packages to one another, a main substrate supporting the semiconductor package module and formed, on a third surface thereof facing the semiconductor package module, with main connection pads which are aligned with the through-holes, and conductive connection members formed in the through-holes and electrically connecting the semiconductor packages with the main connection pads.

Stacked semiconductor package and method for manufacturing the same

A substrate for a semiconductor package is provided having first and second core layers defining a cavity having an adhesive member and sized and shaped to receive a semiconductor chip. The semiconductor package further having a connection member formed on a bond finger and connected to a via pattern formed through the first and second core layers. A stack package is also provided having multiple substrates.

Substrate for semiconductor package, semiconductor package including the same, and stack package using the semiconductor package

A semiconductor device for use in a printed circuit board is provided. In the semiconductor device, metal pillars are disposed perpendicular to bond pads of a semiconductor die. This configuration eliminates the need to form via holes for the connection of interconnection layers and the bond pads of the semiconductor die, thus simplifying the fabrication procedure of the semiconductor device. In addition, the semiconductor die is embedded in the semiconductor device. Based on this configuration, the use of the semiconductor device in a printed circuit board facilitates the stacking of a plurality of semiconductor dies and can reduce the thickness required for the stack, which make the semiconductor device light in weight and small in thickness and size.

Semiconductor device having insulating and interconnection layers

A substrate for a semiconductor device and a manufacturing thereof, and a semiconductor device using the same and a manufacturing method thereof are disclosed. For example, in the substrate according to the present invention, a core is eliminated, so that the substrate has a very thin thickness, as well, the length of electrically conductive patterns becomes shorter, whereby the electrical efficiency thereof is improved. Moreover, since a carrier having a stiffness of a predetermined strength is bonded on the substrate, it can prevent a warpage phenomenon during the manufacturing process of the semiconductor device. Furthermore, the carrier is removed from the substrate, whereby a solder ball fusing process or an electrical connecting process of the semiconductor die can be easily performed.

Growing community of inventors

Seoul, South Korea

Kyu Won Lee