Skhynix Inc.

Hyundai Motor Company

Kia Corporation

Kyu Tae Park

Sun Hwa Kim

Jin Yong Seong

Marco Passerini

Ki Sub Lee

Yu Seok Kim

Min Jin Kim

Yun Tack Han

Byung Deuk Jeon

Seong Ju Lee

Bon Kwang Koo

Young June Park

Byung Gun Song

Seung Ah Yu

Han Hyung Lee

Tei Cho

Chi Hyun Kim

A data communication apparatus includes a transceiver coupled to a data path and configured to transmit or receive data through the data path; and an interrupt circuit coupled to an interrupt path corresponding to the data path and configured to determine whether to allow any apparatus to occupy the data path. The interrupt circuit generates an interrupt signal for preventing another apparatus from accessing the data path, in response to an activation signal for transmitting or receiving the data through the transceiver.

Apparatus and method for data communications between non-volatile memory devices and a memory controller

A method of manufacturing an Electricity-Generating Assembly (EGA) includes: preparing an electrolyte membrane including a central portion and a peripheral portion; providing a contact member to the peripheral portion of the electrolyte membrane; providing at least one of a first Gas Diffusion Electrode (GDE) including a reaction portion of a first Gas Diffusion Layer (GDL) and a first electrode layer or a second GDE including a reaction portion of a second GDL and a second electrode layer, on at least one central portion of the first surface of the electrolyte membrane or the second surface of the electrolyte membrane; and providing a gas diffusion portion of a respective GDL among the first and second GDLs on the contact member.

Method of manufacturing electricity-generating assembly

Provided herein may be a memory device and a method of operating the same. The memory device may include a memory cell array including multiple planes, a peripheral circuit configured to perform an operation on the multiple planes, a control memory configured to store control codes for controlling the peripheral circuit, and a plurality of independent control logic configured to, when a command corresponding to each of the planes is received from a memory controller, control the peripheral circuit with reference to a control code corresponding to the command in response to the command. The control memory includes a common memory configured to be accessible in common by the plurality of independent control logic, and a temporary storage including areas respectively corresponding to the planes.

Memory device and method of operating the memory device

Provided herein may be a storage device and a method of operating the storage device. A memory device may include a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform an operation on memory cells selected from among the plurality of memory cells, a voltage variation detector configured to generate voltage variation information indicating whether a voltage variation has occurred in a supply voltage during performance of the operation, a power register configured to store the voltage variation information, a status register configured to store status information indicating an operating status of the memory device, and a register output controller configured to update the status information provided from the status register based on the voltage variation information.

Storage device and method of operating of the storage device

A memory system includes a representative memory device directly outputting a representative data strobe signal, at least one non-representative memory device outputting a non-representative data strobe signal through the representative memory device, and a controller generating an internal delay clock signal synchronized with the representative data strobe signal. The controller outputs a test mode code defining a delay time using the internal delay clock signal as a reference signal. The at least one non-representative memory device adjusts a phase of the non-representative data strobe signal such that the non-representative data strobe signal has a delay time corresponding to the test mode code.

Memory systems having a plurality of memory devices and methods of training the memory systems

A regulator having improved voltage control capability may include a comparator, an output voltage generator, a voltage divider, and an output voltage controller. The comparator generates a comparison voltage by comparing a reference voltage with a feedback voltage. The output voltage generator generates an output voltage by using a power supply voltage, based on the comparison voltage. The voltage divider may include a first resistor and a second resistor, which generate the feedback voltage by dividing the output voltage. The output voltage controller adjusts a resistance value of at least one of the first resistor and the second resistor, based on a result of comparing the output voltage with a target voltage.

Regulator and memory device having the same

A temperature sensor includes a first current generating circuit configured to generate a first current being constant regardless of temperature changes, a cascode circuit configured to generate a cascode voltage, a second current generating circuit configured to generate a second current being in inverse proportion to temperature, and a compensated voltage output circuit configured to output a compensated voltage having various temperature coefficients in response to the first current and the second current.

Growing community of inventors

Icheon-si, South Korea

Kyu Tae Park