Samsung Thales Co., Ltd.

Kyu-Ha Lee

Chung-Yong Lee

The present invention based on the LUT enables to perform a filtering at a low speed on a place where a high-speed process is necessary. Particularly, the LUT structure having a block structure is advantageous for filtering at a low speed, and for decreasing memory usage. The filter structure proposed by the present invention provides the equivalent performances to those of the traditional ones, yet conducts the filtering on an interpolation process requiring a high-speed process previously at a low speed and at a low power instead. Moreover, compared to the traditional LUT based filter, the present invention provides a new structure with a decreased memory demand. In short, the present invention provides a new filter structure that enables to implement an interpolation filter, a high-speed processor of a sending end in a wireless telecommunication system, with a low complexity and a low power consumption.

Block interpolation filter structure using lookup table

Disclosed is a digital sampling rate converter for compensating for a drop of an in-band signal, the digital sampling rate converter including a CIC (Cascaded Integrator-Comb) decimator for performing a decimation operation at a first decimation ratio based on an overall decimation ratio, for an input signal; a sub-decimator for performing a decimation operation at a second decimation ratio for a signal output from the CIC decimator; and a compensation unit for performing at least two multiplication operations and two addition operations with respect to a signal output from the sub-decimator using a lowest operation clock frequency in an assigned band.

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Seoul, South Korea

Kyu-Ha Lee