Skhynix Inc.

Kyoung Youn Lee

Byeong Cheol Lee

Don Hyun Choi

Seung Min Yang

A semiconductor device includes a delay time adjustment circuit and an address input circuit. The delay time adjustment circuit adjusts a point in time when charges are supplied to internal nodes according to a voltage level of a back-bias voltage in response to a test mode signal. The delay time adjustment circuit also delays an active signal by a first delay time varying according to amounts of charge of the internal nodes to generate a bank selection signal. The address input circuit is driven by the back-bias voltage. The address input circuit receives an address in response to the bank selection signal to generate an internal address. The address input circuit delays the address by a second delay time varying according to a voltage level of the back-bias voltage.

Semiconductor devices

A power supply circuit to supply an internal voltage to an output node includes: a pull-up driver, in response to a result obtained by comparing the internal voltage to a first reference voltage, configured to generate the internal voltage from a power supply voltage, a pull-down driver, in response to a result obtained by comparing the internal voltage to a second reference voltage, configured to discharge the internal voltage, a pull-up drive blocking unit configured to block the pull-up driver from being driven, in response to the result obtained by comparing the internal voltage to the second reference voltage, and a pull-down drive blocking unit configured to block the pull-down driver from being driven, in response to the result obtained by comparing the internal voltage to the first reference voltage.

Growing community of inventors

Cheongju-si, South Korea

Kyoung Youn Lee