Hynix Semiconductor Inc.

Skhynix Inc.

Kyoung Hwan Park

Young Ok Hong

Hack Seob Shin

Yu Jin Park

Eun Seok Choi

Se Jun Kim

Hyun Seung Yoo

Ki Hong Lee

Jung Ryul Ahn

Ki Seon Park

Won Sic Woo

Moon Sig Joo

Seung Won Kim

Kyung Pil Hwang

Myung Shik Lee

Yong Top Kim

Jae Young Park

An operating method of a semiconductor memory device includes precharging a channel region of a program-inhibited cell of first memory cells coupled to a first word line, selected from a first one of word line groups between a drain select line and a source select line, to a first level based on first data; performing a first program operation for storing the first data in the first memory cells; precharging the channel region of a program-inhibited cell of second memory cells coupled to a second word line, selected from a second one of the word line groups, to a second level based on second data to be stored in the second memory cells; and performing a second program operation for storing the second data in the second memory cells.

Semiconductor memory device and operating method thereof

A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

Flash memory device with an array of gate columns penetrating through a cell stack

A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.

Nonvolatile memory device and method of fabricating the same

A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.

Manufacturing method of flash memory device comprising gate columns penetrating through a cell stack

A method of fabricating a non-volatile memory device, wherein a gate insulating layer, a first conductive layer, a tunneling layer, a trap nitride layer, a blocking oxide layer, and a capping layer are sequentially formed over a semiconductor substrate of a peripheral region. A contact region of the capping layer is etched. A spacer is formed on sidewalls of the capping layer. A contact region of the blocking oxide layer is etched by using the spacer as a mask. The spacer is removed while etching a contact region of the trap nitride layer. A contact region of the tunneling layer is etched.

Method of forming non-volatile memory device

A method of programming a charge trap type non-volatile memory device includes applying a program pulse to a selected memory cell, applying a detrap pulse to the selected memory cell, and applying a program verify pulse to the memory cell. The charge trap type non-volatile memory device includes a memory cell array including a charge trap memory cell, and a high voltage generator for supplying a detrap pulse to the charge trap memory cell.

Charge trap type non-volatile memory device and program method thereof

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Seoul, South Korea

Kyoung Hwan Park