Skhynix Inc.

Kyoung Han Kwon

Seung Wan Chai

A memory device that supports a built-in self-test (BIST) operation includes: a plurality of memory cells; a page buffer group including page buffer circuits respectively coupled to the plurality of memory cells through bit lines; a built-in self-test (BIST) controller configured to generate pattern data to be stored in the page buffer circuits and reference data to be compared with sensed data obtained from the page buffer circuits, and to compare the reference data with the sensed data; and an input/output control circuit configured to input the pattern data to the page buffer circuits and to transfer the sensed data from the page buffer circuits to the BIST controller.

Memory device and operating method thereof

According to an embodiment, a storage device may be provided. The storage device may include a semiconductor memory device, and a memory controller configured for controlling the semiconductor memory device. The semiconductor memory device may include a memory unit including a plurality of memory chips. The semiconductor memory device may include an interface chip realigning serial data received from the memory controller into parallel data and transferring the parallel data to each of the plurality of memory chips.

Growing community of inventors

Seoul, South Korea

Kyoung Han Kwon