Programmable Microelectronics Corporation

Chingis Technology Corporation

Kyoung-Chon Jin

Shiou-Yu Alex Wang

Ker-Ching Liu

Joo-Young Kim

A memory apparatus includes a main memory, a redundant memory, and a substitution control unit. The main memory is configured to receive a read address and output a main data word comprising a plurality of main data sub-words where the read address includes a first portion and a second portion. The redundant memory is configured to receive the read address first portion and output a redundant data sub-word. The substitution control unit includes a substitution control word memory configured to store a plurality of substitution control words and configured to receive the read address first portion and assert a substitution control word including a substitution address second portion. The read address first portion and substitution address second portion form a substitution address. The substitution control unit asserts a substitution control signal when there is a match between the read address and the substitution address.

Redundant memory content substitution apparatus and method

A sense amplifier circuit includes a latch circuit to enhance the speed of a sensing operation and to obviate the need for a latch circuit to capture the output value of the sense amplifier circuit. In one embodiment, first and second differential amplifiers provide a differential signal to the latch circuit. The high gain in the latch circuit resolves the differential signal to a logic signal, which is then provided to an output amplifier. In one embodiment, the differential signal is provided to the latch circuit after the differential signal across the input terminals of the first and second differential amplifiers exceeds a predetermined value.

Growing community of inventors

San Ramon, CA, United States of America

Kyoung-Chon Jin