Hynix Semiconductor Inc.

Skhynix Inc.

Kyoung-Bong Rouh

Seung-Woo Jin

Min-Yong Lee

Yong-Sun Sohn

Young-Sun Sohn

The present invention provides various methods for implanting ions in a semiconductor device that substantially compensate for a difference in threshold voltages between a central portion and edge portions of a substrate generated while performing uniform ion implantation to entire surfaces of a substrate. Other methods for fabricating a semiconductor device improve distribution of transistor parameters across a substrate by forming a nonuniform channel doping layer or by forming a nonuniform junction profile, across the substrate.

Method for implanting ions in semiconductor device

A MOS transistor suppressing a short channel effect includes a substrate, a first diffusion region and a second diffusion region separated from each other by a channel region in an upper portion of the substrate, a gate insulating layer including a first gate insulating layer disposed on a surface of the substrate in the channel region and a second gate insulating layer having a specified depth from the surface of the substrate to be disposed between the first diffusion region and the channel region, and a gate electrode disposed on the first gate insulating layer.

Method of fabricating a MOS transistor having a gate insulation layer with a lateral portion and a vertical portion

The present invention provides a method for implanting ions in a semiconductor device capable of compensating for a difference in threshold voltages between a central portion and edge portions of a substrate generated while performing uniform ion implantation to entire surfaces of a substrate and another method for fabricating a semiconductor device capable of improving distribution of transistor parameters inside a substrate by forming a nonuniform channel doping layer or by forming a nonuniform junction profile.

Disclosed are an ion implantation apparatus and a method for implanting ions by using the same. The ion implanter for implanting ions into a wafer, includes: a first quadrupole magnet assembly for focusing an ion beam transmitted from an ion beam source; a scanner for deflecting the transmitted ion beam in the directions of an X-axis and an Y-axis; a second quadrupole magnet assembly for converging and diverging the ion beam passing through the scanner in the directions of the X- and Y-axes; and a beam parallelizer for rotating the ion beam in synchronization with the second quadrupole magnet assembly, thereby implanting the ion beam into the wafer.

Growing community of inventors

Ichon-shi, South Korea

Kyoung-Bong Rouh