Samsung Electronics Co., Ltd.

Kyooho Jung

Younsoo Kim

Jooho Lee

Jeonggyu Song

Haeryong Kim

Jeong-Gyu Song

Sunmin Moon

Young-Lim Park

Changmu An

Yukyung Shin

Jinho Lee

Yongsung Kim

Junghwa Kim

Younjoung Cho

Se Hyoung Ahn

Myoungho Jeong

Seungmin Ryu

Jeongil Bang

Chang-su Woo

Changsu Woo

Eunsun Kim

Kyuho Cho

Sangyeol Kang

Cheoljin Cho

Hyosik Mun

Dongkwan Baek

Hongseon Song

An integrated circuit device includes a lower electrode including a niobium (Nb)-containing layer doped with titanium (Ti), a dielectric layer on the lower electrode, and an upper electrode that covers the dielectric layer.

Integrated circuit device

A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.

Semiconductor device with capping conductive layer on an electrode and method of fabricating the same

Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.

Semiconductor devices and methods of fabricating the same

Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

Semiconductor memory devices and methods of fabricating the same

A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

Semiconductor device including capacitor with pillar-shaped bottom electrode

A capacitor may include a lower electrode, a dielectric layer structure on the lower electrode, and an upper electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of dielectric layers and at least one insert layer structure between ones of the plurality of dielectric layers. The insert layer structure may include a plurality of zirconium oxide layers and at least one insert layer. The insert layer may be between ones of the plurality of zirconium oxide layers. The capacitor may have a high capacitance and low leakage currents.

Capacitor and a DRAM device including the same

A capacitor includes: a lower electrode including a metal nitride represented by MM'N, wherein M is a metal element, M&#x2032; is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM&#x2032;ON, wherein M is a metal element, M&#x2032; is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.

Integrated circuit device including capacitor with metal nitrate interfacial layer

Integrated circuit device and electronic device including capacitor with interfacial layer containing metal element, other element, nitrogen, and oxygen

A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.

Method of forming oxide film including two non-oxygen elements, method of manufacturing semiconductor device, method of forming dielectric film, and semiconductor device

Semiconductor memory device including capacitor

A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.

Semiconductor device and method of manufacturing the same

Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.

Semiconductor memory device and method of fabricating the same

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Seoul, South Korea

Kyooho Jung