Samsung Electronics Co., Ltd.

KyongSoon Cho

Jae-Min Jung

Jeong-Kyu Ha

Sang-Uk Han

KwanJai Lee

Hansung Ryu

Jae Choon Kim

Jichul Kim

Youngshin Kwon

Yeo-Hoon Yoon

YoungSang Cho

Sunjae Kim

Soyoung Lim

Yungcheol Kong

PaLan Lee

Kyoungsuk Yang

Ikjun Choi

Narae Shin

Myoungkyun Kil

An image sensor package includes a first substrate portion including a first substrate and an upper wiring structure, the upper wiring structure including a stacked structure including a plurality of upper wiring patterns and a plurality of upper wiring vias. The image sensor package includes a second substrate portion including a second substrate and a lower wiring structure, the second substrate defining a trench portion and a via hole. The lower wiring structure includes a stacked structure including a plurality of lower wiring patterns and a plurality of lower wiring vias. The lower wiring structure is in contact with the upper wiring structure, and the plurality of lower wiring patterns include a plurality of lower patterns at different vertical levels. The image sensor package includes a via electrode portion covering an inner sidewall and a bottom surface of the via hole.

Image sensor package

A semiconductor package that includes a circuit board having an opening therein. The circuit board includes a first portion, and a second portion disposed below the first portion. The first portion protrudes further in a horizontal direction towards the opening than the second portion. A transparent substrate is disposed on the circuit board. An image sensor chip is mounted on the circuit board. The image sensor chip includes an active array region facing the transparent substrate. A connection terminal directly contacts a lower surface of the first portion of the circuit board and an upper surface of the image sensor chip. A gap-fill member covers the connection terminal and covers a portion of an upper surface of the image sensor chip and at least a portion of a lateral side surface of the image sensor chip. The transparent substrate has a greater horizontal width than the circuit board.

Semiconductor packages having circuit boards

A semiconductor package is provided. The package includes a semiconductor chip that includes photoelectric conversion elements provided on an active array region of the semiconductor chip; a transparent member on the semiconductor chip; and a spacer between the semiconductor chip and the transparent member, and horizontally spaced apart from the active array region. The spacer includes: a supporter that extends from a top surface of the semiconductor chip toward a bottom surface of the transparent member; a first adhesive pattern that is between the semiconductor chip and a bottom surface of the supporter; and a second adhesive pattern that is between the transparent member a top surface of the supporter. The spacer protrudes from a lateral surface of the semiconductor chip, and a lateral surface of the spacer is offset from the lateral surface of the semiconductor chip.

Semiconductor package

An image sensor package includes a package substrate; an image sensor chip disposed on the package substrate; a dam structure disposed on the image sensor chip and including a dam main body having an opening and a first light absorption layer disposed on an inner wall of the dam main body; a transparent substrate on the dam structure; and an encapsulant contacting the image sensor chip and an outer wall of the dam main body.

A semiconductor package is provided which includes a redistribution substrate, an interconnect substrate on the redistribution substrate, a metal layer on the semiconductor chip, a semiconductor chip on the redistribution substrate and in the hole of the interconnect substrate, and a mold layer in a gap between the semiconductor chip and the interconnect substrate. The interconnect substrate includes a hole penetrating thereinside. The interconnect substrate includes base layers and a conductive member extending through the base layers. A top surface of the interconnect substrate is positioned either above or below the level of the top surface of the metal layer.

Semiconductor packages

Semiconductor packages having redistribution substrate

Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first substrate, and a first semiconductor chip positioned above the first substrate. A second semiconductor chip is positioned above a top surface of the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the second semiconductor chip. A second substrate is disposed on the second semiconductor chip. The second substrate substantially covers a top surface of the second semiconductor chip. A mold layer is disposed between the first substrate and the second substrate.

Semiconductor package and method of fabricating the same

Provided are semiconductor modules and semiconductor packages. The semiconductor module may include a module substrate and a semiconductor package mounted on the module substrate. The semiconductor package may include a substrate with a top surface and a bottom surface. Here, the top surface of the substrate may be flat and the bottom surface of the substrate may include a first region and a second region positioned at a lower level than the first region. The semiconductor package may further include connecting portions which are provided on the bottom surface of the substrate and electrically connected to the module substrate.

Semiconductor modules and semiconductor packages

Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.

Chip-on-film package and device assembly including the same

A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.

Methods of fabricating tape film packages

A display device includes a display panel including panel bumps, a flexible circuit film connected to the display panel and including a chip, and panel bonding leads connecting the display panel to the chip. The panel bumps include first panel bumps arranged along a first row, and second panel bumps arranged along a second row which is spaced apart from the first row toward the chip. Each second panel bump is disposed between two adjacent first panel bumps when viewed from a column direction perpendicular to a row direction. The panel bonding leads includes first panel bonding leads connected to the first panel bumps and second panel bonding leads connected to the second panel bumps. Each first panel bonding lead includes a first portion having a first thickness, and a second portion adjacent to the second panel bump having a second thickness smaller than the first thickness.

Display device

Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.

Growing community of inventors

Incheon, South Korea

KyongSoon Cho