Samsung Display Co., Ltd.

Kyonghwan Oh

Mihae Kim

Kyeonghwa Kim

Jae-Ho Choi

Seunghan Jo

Minchae Kwak

Sumi Jang

Wonkyu Kwak

Nuree Um

Jihyun Ka

Won Kyu Kwak

Jaewon Kim

Yangwan Kim

Ki Myeong Eom

Ji-Hyun Ka

Hyungjun Park

Hai-Jung In

Yunkyeong In

Jisu Na

Youngsoo Yoon

Kyung-Hoon Kim

Junyong An

Chulkyu Kang

Hyunji Cha

Minwoo Byun

Junwon Choi

Kimyeong Eom

Jintae Jeong

Yang-Hwa Choi

Seunghee Lee

Minjoo Kim

Taehoon Kwon

Haijung In

Minku Lee

Changsoo Pyon

Kyunghoon Kim

Mina Kim

Jaedu Noh

Soongi Kwon

Chaehan Hyun

Donghwan Jeon

Kyung-hoon Kim

A gate driver includes a plurality of stages. At least one of the stages includes a control circuit configured to control a first control node in response to a first carry clock signal, a node separation transistor connected between the first control node and a second control node, a carry output circuit configured to output a carry signal in response to a voltage of the second control node, and a plurality of gate output circuits configured to output a plurality of gate signals having different timings in response to the voltage of the second control node.

Gate driver

A display apparatus includes: a substrate including: a first region; a second region; a first non-display area surrounding the first region and the second region; and a display area surrounding at least a portion of an outline of the first non-display area; a plurality of dummy pixels at the first non-display area, and to not emit light; a plurality of emission control lines connected to at least one of the plurality of dummy pixels; and a plurality of power supply lines to supply a driving voltage to the plurality of dummy pixels, respectively. One of the plurality of power supply lines is electrically connected to one of the plurality of emission control lines, and one of the plurality of power supply lines is connected to one of the plurality of dummy pixels.

Display apparatus including dummy pixels in a non-display area

A driver is disposed in a display panel, and includes a plurality of stages. At least one stage of the plurality of stages includes an input circuit which transfers an input signal to a first node in response to at least one of a clock signal and an inverted clock signal, and inverters which generate an output signal based on a voltage of the first node. At least one of the inverters includes a p-type metal-oxide-semiconductor ('PMOS') transistor and an n-type metal-oxide-semiconductor (“NMOS”) transistor connected in series between a line transferring a relatively high gate voltage and a line transferring a relatively low gate voltage. A first active region of the PMOS transistor includes a material different from a material of a second active region of the NMOS transistor.

Driver and display device

A display device includes a circular display area and a non-display area surrounding the circular display area. The display device may further include a load matcher disposed adjacent to an edge of the circular display area in the circular display area, a pixel disposed in the circular display area, spaced apart from the non-display area by the load matcher, and connected to the load matcher, and a repair pixel disposed adjacent to the edge of the circular display area in the non-display area, and connected to the pixel.

Display device

A display device includes a substrate on which a display area including a plurality of pixels and a non-display area surrounding the display area are defined, a first voltage line disposed on the substrate in the non-display area, where the first voltage line provides a first voltage to the pixels, a second voltage line disposed on the substrate in the non-display area, where the second voltage line provides a second voltage to the pixels, and a first demux circuit area and a second demux circuit area disposed on the substrate in the non-display area, where the first demux circuit area and the second demux circuit area transmit data signals to the pixels. The first voltage line passes an area between the first demux circuit area and the second demux circuit area.

A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region.

Display device with intersecting data lines adjacent hole region and electronic device including the same

A display device may include a substrate including a circular display area and a non-display area, a plurality of pixels including a first pixel and a second pixel disposed on the display area of the substrate, a first sub-demux circuit connected to the first pixel and disposed on the non-display area, a second sub-demux circuit connected to the second pixel and disposed on the non-display area, a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer first and second data input signals to the first and second sub-demux circuits, and a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels. Some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit.

Round display device having a demultiplexer located between gate stages and light emitting stages

A pixel capable of adjusting a threshold voltage of a driving transistor, the pixel including: a display element configured to emit light during an emission period and including an anode and a cathode, the first transistor including an upper gate and a lower gate and configured to control a magnitude of a driving current flowing to the display element, a storage capacitor connected to the upper gate of the first transistor, and a second transistor configured to be turned on during a data writing period to transmit a data voltage to the first transistor, wherein a lower gate-source voltage of the first transistor has a first voltage level in the data writing period and a second voltage level in the emission period.

Pixel capable of adjusting a threshold voltage of a driving transistor

A display panel of an organic light emitting diode (OLED) display device having a display region includes a plurality of first pixels located at an upper half of the display region, a plurality of second pixels located at a lower half of the display region, a plurality of first data lines extending in a first direction, and coupled to the plurality of first pixels, a plurality of second data lines extending in the first direction, disposed alternately with the plurality of first data lines along a second direction crossing the first direction, and coupled to the plurality of second pixels, and a demultiplexing circuit configured to selectively couple a plurality of data channels of a data driver of the OLED display device to the plurality of first data lines or the plurality of second data lines.

Display panel of an organic light emitting diode display device, and organic light emitting diode display device

Display device having a circular display area and non-display area with demux circuit

A display apparatus includes a substrate including a transmitting area, a display area surrounding the transmitting area, a first non-display area disposed between the transmitting area and the display area, and a second non-display area surrounding the display area. A plurality of pixels is arranged in the display area. A set of 2n connection wirings (where n is a positive integer) is disposed in the first non-display area and each of the 2n connection wirings extends along at least a part of an edge of the transmitting area. Each of a plurality of voltage wirings extends in a first direction and is connected to at least some of pixels disposed in a common row from among the plurality of pixels. Each of the plurality of voltage wirings is connected to one of the 2n connection wirings.

Display apparatus having a transmitting area

A pixel includes an organic light-emitting diode; a first transistor that receives a signal in response to a voltage applied to a first node and controls an amount of current flowing from a second node electrically connected to a power supply voltage line to the organic light-emitting diode; a fourth transistor electrically connected between the first node and a first initializing voltage line; and a bias capacitor electrically connected between the second node and a light-emission control line, the bias capacitor including a first capacitor electrode and a second capacitor electrode. The first capacitor electrode of the bias capacitor and a semiconductor layer of the first transistor are disposed on a same layer, and the second capacitor electrode of the bias capacitor and a second portion included in a gate electrode of the fourth transistor are disposed on a same layer.

Pixel, and organic light-emitting display device comprising the same

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Yongin-si, South Korea

Kyonghwan Oh